diff options
| author | NIIBE Yutaka <gniibe@fsij.org> | 2016-05-23 20:15:47 +0900 |
|---|---|---|
| committer | NIIBE Yutaka <gniibe@fsij.org> | 2016-05-23 20:15:47 +0900 |
| commit | 2704416c384d5e2990621b15be01f37f4f9c49e0 (patch) | |
| tree | 7b81307927f150b7be9ffcbdfcbe78432dcd577c | |
| parent | 77255b0c1d3272b38e75f76e02830556ec436cb9 (diff) | |
Fix PSR handling (ORRS instruction changes PSR)
| -rw-r--r-- | ChangeLog | 4 | ||||
| -rw-r--r-- | chopstx.c | 18 |
2 files changed, 13 insertions, 9 deletions
@@ -1,5 +1,9 @@ 2016-05-23 NIIBE Yutaka <gniibe@fsij.org> + * chopst.x (chx_sched) [__ARM_ARCH_6M__]: Maintain PSR. + +2016-05-23 NIIBE Yutaka <gniibe@fsij.org> + * chopstx.c (chopstx_poll): Fix a race. Check COUNTER. * example-cdc/usb-cdc.c (tty_input_char): Include newline. @@ -727,7 +727,7 @@ chx_request_preemption (uint16_t prio) * AAPCS: ARM Architecture Procedure Call Standard * * Returns: - * 1 on erroneous wakeup. + * 1 on wakeup by others. * 0 on normal wakeup. * -1 on cancellation. */ @@ -855,11 +855,11 @@ chx_sched (uint32_t yield) "lsl r1, r0, #23\n\t" "bcc 2f\n\t" /**/ - "msr APSR_nzcvq, r0\n\t" - "ldr r0, [sp, #24]\n\t" + "ldr r2, [sp, #24]\n\t" "mov r1, #1\n\t" - "orr r0, r1\n\t" /* Ensure Thumb-mode */ - "str r0, [sp, #32]\n\t" + "orr r2, r1\n\t" /* Ensure Thumb-mode */ + "str r2, [sp, #32]\n\t" + "msr APSR_nzcvq, r0\n\t" /**/ "ldr r0, [sp, #20]\n\t" "mov lr, r0\n\t" @@ -869,11 +869,11 @@ chx_sched (uint32_t yield) "add sp, #16\n\t" "pop {pc}\n" "2:\n\t" - "msr APSR_nzcvq, r0\n\t" - "ldr r0, [sp, #24]\n\t" + "ldr r2, [sp, #24]\n\t" "mov r1, #1\n\t" - "orr r0, r1\n\t" /* Ensure Thumb-mode */ - "str r0, [sp, #28]\n\t" + "orr r2, r1\n\t" /* Ensure Thumb-mode */ + "str r2, [sp, #28]\n\t" + "msr APSR_nzcvq, r0\n\t" /**/ "ldr r0, [sp, #20]\n\t" "mov lr, r0\n\t" |