diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/sbi/sbi_csr_detect.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/sbi/sbi_csr_detect.h b/include/sbi/sbi_csr_detect.h index f294888..89ba294 100644 --- a/include/sbi/sbi_csr_detect.h +++ b/include/sbi/sbi_csr_detect.h @@ -12,6 +12,7 @@ #include <sbi/riscv_encoding.h> #include <sbi/sbi_hart.h> +#include <sbi/sbi_trap.h> #define csr_read_allowed(csr_num, trap) \ ({ \ @@ -19,6 +20,7 @@ register ulong ttmp asm("a4"); \ register ulong mtvec = sbi_hart_expected_trap_addr(); \ register ulong ret = 0; \ + ((struct sbi_trap_info *)(trap))->cause = 0; \ asm volatile( \ "add %[ttmp], %[tinfo], zero\n" \ "csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n" \ @@ -36,6 +38,7 @@ register ulong tinfo asm("a3") = (ulong)trap; \ register ulong ttmp asm("a4"); \ register ulong mtvec = sbi_hart_expected_trap_addr(); \ + ((struct sbi_trap_info *)(trap))->cause = 0; \ asm volatile( \ "add %[ttmp], %[tinfo], zero\n" \ "csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n" \ |