diff options
| author | Atish Patra <atish.patra@wdc.com> | 2020-02-04 15:09:15 -0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-02-05 10:46:29 +0530 |
| commit | 2c2bbe7374b127b4ca4e0aa5d6cfb3f5bd21a2ee (patch) | |
| tree | 1f363563c22304ea6a12ea2d8d9655eefb1dfe5c /platform | |
| parent | d79173b4b7519b537cf64c984d27daa26aad23c0 (diff) | |
platform: sifive/fu540: Set tlb range flush limit to zero
It was reported that tlb range flush is not working on fu540.
Only tlb full flush seems to work on fu540 probably due to some
hardware errata.
Set the tlb flush limit to zero so that all tlb flush requests
are converted to full flush.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'platform')
| -rw-r--r-- | platform/sifive/fu540/platform.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c index c8ead9d..48bcf54 100644 --- a/platform/sifive/fu540/platform.c +++ b/platform/sifive/fu540/platform.c @@ -52,6 +52,9 @@ #define FU540_PRCI_CLKMUXSTATUSREG 0x002C #define FU540_PRCI_CLKMUX_STATUS_TLCLKSEL (0x1 << 1) +/* Full tlb flush always */ +#define FU540_TLB_RANGE_FLUSH_LIMIT 0 + /* clang-format on */ static void fu540_modify_dt(void *fdt) @@ -171,6 +174,11 @@ static int fu540_ipi_init(bool cold_boot) return clint_warm_ipi_init(); } +static u64 fu540_get_tlbr_flush_limit(void) +{ + return FU540_TLB_RANGE_FLUSH_LIMIT; +} + static int fu540_timer_init(bool cold_boot) { int rc; @@ -202,6 +210,7 @@ const struct sbi_platform_operations platform_ops = { .ipi_send = clint_ipi_send, .ipi_clear = clint_ipi_clear, .ipi_init = fu540_ipi_init, + .get_tlbr_flush_limit = fu540_get_tlbr_flush_limit, .timer_value = clint_timer_value, .timer_event_stop = clint_timer_event_stop, .timer_event_start = clint_timer_event_start, |