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authorNIIBE Yutaka <gniibe@fsij.org>2015-09-07 17:06:05 +0900
committerNIIBE Yutaka <gniibe@fsij.org>2015-09-07 17:06:05 +0900
commit014dbf25f628a3befb930d23ee0c24d4e9b8f929 (patch)
tree31b25440aa30c411e98571efcaa3a7d15cd9d181 /example-primer2/lcd.ld
parent41610443d4d53d229d83509464f73f2bd52d98e2 (diff)
Add example-primer2
Diffstat (limited to 'example-primer2/lcd.ld')
-rw-r--r--example-primer2/lcd.ld148
1 files changed, 148 insertions, 0 deletions
diff --git a/example-primer2/lcd.ld b/example-primer2/lcd.ld
new file mode 100644
index 0000000..dbda939
--- /dev/null
+++ b/example-primer2/lcd.ld
@@ -0,0 +1,148 @@
+/*
+ * ST32F103 memory setup.
+ */
+__main_stack_size__ = 0x0100; /* Exception handlers */
+__process0_stack_size__ = 0x0200; /* main */
+__process1_stack_size__ = 0x0100; /* lcd init */
+__process2_stack_size__ = 0x0180; /* rng */
+__process3_stack_size__ = 0x0100; /* None yet */
+
+MEMORY
+{
+ flash0 : org = 0x08000000, len = 4k
+ flash : org = 0x08000000+0x1000, len = 512k - 4k
+ ram : org = 0x20000000, len = 64k
+}
+
+/* __flash_start__: flash ROM start address regardless of DFU_SUPPORT */
+__flash_start__ = 0x08001000;
+__flash_end__ = ORIGIN(flash) + LENGTH(flash);
+
+__ram_start__ = ORIGIN(ram);
+__ram_size__ = LENGTH(ram);
+__ram_end__ = __ram_start__ + __ram_size__;
+
+SECTIONS
+{
+ . = 0;
+
+ .sys : ALIGN(4) SUBALIGN(4)
+ {
+ _sys = .;
+ KEEP(*(.vectors))
+ . = ALIGN(16);
+ *(.sys.version)
+ build/sys.o(.text)
+ build/sys.o(.text.*)
+ build/sys.o(.rodata)
+ build/sys.o(.rodata.*)
+ . = ALIGN(1024);
+ *(.sys.0)
+ *(.sys.1)
+ *(.sys.2)
+ } > flash0
+
+ _text = .;
+
+ .startup : ALIGN(128) SUBALIGN(128)
+ {
+ KEEP(*(.startup.vectors))
+ . = ALIGN (16);
+ } > flash =0xffffffff
+
+ .text : ALIGN(16) SUBALIGN(16)
+ {
+ *(.text.startup.*)
+ *(.text)
+ *(.text.*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.glue_7t)
+ *(.glue_7)
+ *(.gcc*)
+ . = ALIGN(8);
+ } > flash
+
+ .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} > flash
+
+ .ARM.exidx : {
+ PROVIDE(__exidx_start = .);
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ PROVIDE(__exidx_end = .);
+ } > flash
+
+ .eh_frame_hdr : {*(.eh_frame_hdr)} > flash
+
+ .eh_frame : ONLY_IF_RO {*(.eh_frame)} > flash
+
+ .textalign : ONLY_IF_RO { . = ALIGN(8); } > flash
+
+ _etext = .;
+ _textdata = _etext;
+
+ .stacks :
+ {
+ . = ALIGN(8);
+ __main_stack_base__ = .;
+ . += __main_stack_size__;
+ . = ALIGN(8);
+ __main_stack_end__ = .;
+ __process0_stack_base__ = .;
+ . += __process0_stack_size__;
+ . = ALIGN(8);
+ __process0_stack_end__ = .;
+ __process1_stack_base__ = .;
+ . += __process1_stack_size__;
+ . = ALIGN(8);
+ __process1_stack_end__ = .;
+ __process2_stack_base__ = .;
+ . += __process2_stack_size__;
+ . = ALIGN(8);
+ __process2_stack_end__ = .;
+ __process3_stack_base__ = .;
+ . += __process3_stack_size__;
+ . = ALIGN(8);
+ __process3_stack_end__ = .;
+ } > ram
+
+ .data :
+ {
+ . = ALIGN(4);
+ PROVIDE(_data = .);
+ *(.data)
+ . = ALIGN(4);
+ *(.data.*)
+ . = ALIGN(4);
+ *(.ramtext)
+ . = ALIGN(4);
+ PROVIDE(_edata = .);
+ } > ram AT > flash
+
+ .bss :
+ {
+ . = ALIGN(4);
+ PROVIDE(_bss_start = .);
+ *(.bss)
+ . = ALIGN(4);
+ *(.bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ PROVIDE(_bss_end = .);
+ } > ram
+
+ PROVIDE(end = .);
+ _end = .;
+ . = ALIGN(512);
+ /* reGNUal is now relocatable, it's OK not using fixed address. */
+ _regnual_start = .;
+
+ .fill_ffff :
+ {
+ . = ALIGN (2048);
+ *(.passwd)
+ } > flash =0xffffffff
+}
+
+__heap_base__ = _end;
+__heap_end__ = __ram_end__;