diff options
| author | NIIBE Yutaka <gniibe@fsij.org> | 2016-06-28 15:48:15 +0900 |
|---|---|---|
| committer | NIIBE Yutaka <gniibe@fsij.org> | 2016-06-28 15:48:15 +0900 |
| commit | 15a4403f244f70234dce8f6a89ea94796dee3022 (patch) | |
| tree | 0108c0ba4a1fea0f52c720f33df7161f1d9015e8 /contrib | |
| parent | 40adf95c24f85f475896e1c55e1af5f32349729a (diff) | |
chopstx_poll change
Diffstat (limited to 'contrib')
| -rw-r--r-- | contrib/adc-mkl27z.c | 7 | ||||
| -rw-r--r-- | contrib/adc-stm32f103.c | 3 |
2 files changed, 6 insertions, 4 deletions
diff --git a/contrib/adc-mkl27z.c b/contrib/adc-mkl27z.c index 19f9f5b..d5b679e 100644 --- a/contrib/adc-mkl27z.c +++ b/contrib/adc-mkl27z.c @@ -295,12 +295,13 @@ adc_stop (void) int adc_wait_completion (void) { + struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&adc_intr }; + int i; + while (1) { - int i; - /* Wait DMA completion */ - chopstx_poll (NULL, 1, &adc_intr); + chopstx_poll (NULL, 1, pd_array); DMA0->DSR_BCR = (1 << 24); DMA1->DSR_BCR = (1 << 24); diff --git a/contrib/adc-stm32f103.c b/contrib/adc-stm32f103.c index 6a8076e..a44942f 100644 --- a/contrib/adc-stm32f103.c +++ b/contrib/adc-stm32f103.c @@ -298,10 +298,11 @@ int adc_wait_completion (void) { uint32_t flags; + struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&adc_intr }; while (1) { - chopstx_poll (NULL, 1, &adc_intr); + chopstx_poll (NULL, 1, pd_array); flags = DMA1->ISR & STM32_DMA_ISR_MASK; /* Channel 1 interrupt cause. */ /* * Clear interrupt cause of channel 1. |