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authorNIIBE Yutaka <gniibe@fsij.org>2014-07-31 14:56:16 +0900
committerNIIBE Yutaka <gniibe@fsij.org>2014-12-10 18:50:09 +0900
commitf865e5149c7c8c82f1b6a62511f5310845803986 (patch)
tree19ecf7b8dcc6a681ed9510668c2be4844ecb2ab5 /board
parent5137db82902ded4cabb4667ade17d1732f73c736 (diff)
Add FSM-55.
Diffstat (limited to 'board')
-rw-r--r--board/board-fsm-55.h42
1 files changed, 42 insertions, 0 deletions
diff --git a/board/board-fsm-55.h b/board/board-fsm-55.h
new file mode 100644
index 0000000..9cb405e
--- /dev/null
+++ b/board/board-fsm-55.h
@@ -0,0 +1,42 @@
+/*
+ * Running at 48MHz with HSI as clock source.
+ *
+ */
+#define MCU_STM32F0 1
+/* __ARM_ARCH_6M__ */
+
+
+#define FLASH_PAGE_SIZE 1024
+
+#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE 12
+#define STM32_HSICLK 8000000
+
+#define GPIO_LED_SET_TO_EMIT 5
+
+/*
+ * Port A setup.
+ * PA5 - ON (LED 1:ON 0:OFF)
+ * PA4 - Pull DOWN
+ */
+#define VAL_GPIO_MODER 0x00145555 /* Output Pin0-7, Pin9 and Pin10 */
+#define VAL_GPIO_OTYPER 0x0000001f /* Open-drain for Pin0-4, Push-Pull*/
+#define VAL_GPIO_OSPEEDR 0x003cffff /* High speed */
+#define VAL_GPIO_PUPDR 0x00000000 /* No pull-up/pull-down */
+
+#define GPIO_LED_BASE GPIOA_BASE
+
+#define RCC_ENR_IOP_EN (RCC_AHBENR_IOPAEN | RCC_AHBENR_IOPFEN)
+#define RCC_RSTR_IOP_RST (RCC_AHBRSTR_IOPARST | RCC_AHBRSTR_IOPFRST)
+
+/* ??? NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
+
+#define GPIO_OTHER_BASE GPIOF_BASE /* USER BUTTON */
+/*
+ * Port F setup.
+ * PF0 - USER Button
+ */
+#define VAL_GPIO_OTHER_MODER 0x00000000 /* Input Pin0 */
+#define VAL_GPIO_OTHER_OTYPER 0x00000000
+#define VAL_GPIO_OTHER_OSPEEDR 0x00000000
+#define VAL_GPIO_OTHER_PUPDR 0x00000001 /* Pull-up Pin0 */