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authorNIIBE Yutaka <gniibe@fsij.org>2015-07-29 17:06:17 +0900
committerNIIBE Yutaka <gniibe@fsij.org>2015-07-29 17:06:17 +0900
commita9de53c36be5ca31974cbf3c7903ca5cf7f7fff2 (patch)
tree0ff6c70ab4d493e907d5f4f1e8ee8584580bde8b /board
parent83486efd5f7857e539c79ed9c947cec854468240 (diff)
board update, adding ST Dongle
Diffstat (limited to 'board')
-rw-r--r--board/board-cq-starm.h4
-rw-r--r--board/board-fsm-55.h2
-rw-r--r--board/board-fst-01-00.h1
-rw-r--r--board/board-fst-01.h45
-rw-r--r--board/board-maple-mini.h1
-rw-r--r--board/board-olimex-stm32-h103.h1
-rw-r--r--board/board-st-dongle.h33
-rw-r--r--board/board-stbee-mini.h1
-rw-r--r--board/board-stbee.h2
-rw-r--r--board/board-stm32-primer2.h2
-rw-r--r--board/board-stm32f0-discovery.h2
-rw-r--r--board/board-stm8s-discovery.h35
12 files changed, 82 insertions, 47 deletions
diff --git a/board/board-cq-starm.h b/board/board-cq-starm.h
index 1519074..0f08b33 100644
--- a/board/board-cq-starm.h
+++ b/board/board-cq-starm.h
@@ -1,7 +1,6 @@
#define BOARD_NAME "CQ STARM"
#define BOARD_ID 0xc5480875
-#define FLASH_PAGE_SIZE 1024
#define STM32F10X_MD /* Medium-density device */
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
@@ -10,8 +9,7 @@
#define GPIO_LED_BASE GPIOC_BASE
#define GPIO_LED_SET_TO_EMIT 6
-#undef GPIO_USB_BASE
-#undef GPIO_USB_CLEAR_TO_ENABLE
+#undef GPIO_USB_BASE /* No external DISCONNECT/RENUM circuit. */
#define GPIO_OTHER_BASE GPIOA_BASE
/*
diff --git a/board/board-fsm-55.h b/board/board-fsm-55.h
index 9522567..54b486d 100644
--- a/board/board-fsm-55.h
+++ b/board/board-fsm-55.h
@@ -9,8 +9,6 @@
/* __ARM_ARCH_6M__ */
-#define FLASH_PAGE_SIZE 1024
-
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 12
#define STM32_HSICLK 8000000
diff --git a/board/board-fst-01-00.h b/board/board-fst-01-00.h
index 0e01b90..80ecdd5 100644
--- a/board/board-fst-01-00.h
+++ b/board/board-fst-01-00.h
@@ -1,7 +1,6 @@
#define BOARD_NAME "FST-01-00"
#define BOARD_ID 0x613870a9
-#define FLASH_PAGE_SIZE 1024
#define STM32F10X_MD /* Medium-density device */
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
diff --git a/board/board-fst-01.h b/board/board-fst-01.h
index 56cd132..97262cd 100644
--- a/board/board-fst-01.h
+++ b/board/board-fst-01.h
@@ -2,7 +2,6 @@
#define BOARD_ID 0x696886af
/* echo -n "FST-01" | sha256sum | sed -e 's/^.*\(........\) -$/\1/' */
-#define FLASH_PAGE_SIZE 1024
#define STM32F10X_MD /* Medium-density device */
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
@@ -15,19 +14,6 @@
#define GPIO_USB_SET_TO_ENABLE 10
#undef GPIO_OTHER_BASE
-/* For pin-cir settings of Gnuk */
-#define TIMx TIM2
-#define INTR_REQ_TIM TIM2_IRQ
-#define AFIO_EXTICR_INDEX 0
-#define AFIO_EXTICR1_EXTIx_Py AFIO_EXTICR1_EXTI2_PA
-#define EXTI_PR EXTI_PR_PR2
-#define EXTI_IMR EXTI_IMR_MR2
-#define EXTI_FTSR_TR EXTI_FTSR_TR2
-#define INTR_REQ_EXTI EXTI2_IRQ
-#define ENABLE_RCC_APB1
-#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM2EN
-#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM2RST
-
/*
* Port A setup.
* PA0 - input with pull-up (TIM2_CH1): AN0 for NeuG
@@ -65,3 +51,34 @@
#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)
+
+/*
+ * Board specific information other than clock and GPIO initial
+ * setting should not be in board-*.h, but each driver should include
+ * information by itself.
+ *
+ * Please see NeuG's ADC driver how board specific handling is done.
+ *
+ * Given the situation of Chopstx's boards support, which is not that
+ * huge, this works well. If scalability and flexibility will matter,
+ * we will need something like device tree in which boot process can
+ * pass information to application program.
+ *
+ * Following constants are here, because experimental CIR driver is
+ * written before this design decision of Chopstx.
+ *
+ * Those will be removed soon, once such an driver will be improved
+ * in new style.
+ */
+/* For pin-cir settings of Gnuk */
+#define TIMx TIM2
+#define INTR_REQ_TIM TIM2_IRQ
+#define AFIO_EXTICR_INDEX 0
+#define AFIO_EXTICR1_EXTIx_Py AFIO_EXTICR1_EXTI2_PA
+#define EXTI_PR EXTI_PR_PR2
+#define EXTI_IMR EXTI_IMR_MR2
+#define EXTI_FTSR_TR EXTI_FTSR_TR2
+#define INTR_REQ_EXTI EXTI2_IRQ
+#define ENABLE_RCC_APB1
+#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM2EN
+#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM2RST
diff --git a/board/board-maple-mini.h b/board/board-maple-mini.h
index c288d2d..5f617f6 100644
--- a/board/board-maple-mini.h
+++ b/board/board-maple-mini.h
@@ -1,7 +1,6 @@
#define BOARD_NAME "Maple Mini"
#define BOARD_ID 0x7a445272
-#define FLASH_PAGE_SIZE 1024
#define STM32F10X_MD /* Medium-density device */
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
diff --git a/board/board-olimex-stm32-h103.h b/board/board-olimex-stm32-h103.h
index 9bd011f..804883b 100644
--- a/board/board-olimex-stm32-h103.h
+++ b/board/board-olimex-stm32-h103.h
@@ -1,7 +1,6 @@
#define BOARD_NAME "Olimex STM32-H103"
#define BOARD_ID 0xf92bb594
-#define FLASH_PAGE_SIZE 1024
#define STM32F10X_MD /* Medium-density device */
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
diff --git a/board/board-st-dongle.h b/board/board-st-dongle.h
new file mode 100644
index 0000000..3ccf025
--- /dev/null
+++ b/board/board-st-dongle.h
@@ -0,0 +1,33 @@
+#define BOARD_NAME "ST Dongle"
+/* echo -n "ST Dongle" | shasum -a 256 | sed -e 's/^.*\(........\) -$/\1/' */
+#define BOARD_ID 0x2cd4e471
+
+#define STM32F10X_MD /* Medium-density device */
+
+#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE 9
+#define STM32_HSECLK 8000000
+
+#define GPIO_LED_BASE GPIOA_BASE
+#define GPIO_LED_SET_TO_EMIT 9
+#define GPIO_USB_BASE GPIOA_BASE
+#define GPIO_USB_SET_TO_ENABLE 15
+#undef GPIO_OTHER_BASE
+
+/*
+ * Port A setup.
+ * PA0 - input with pull-up. AN0
+ * PA1 - input with pull-up. AN1
+ * PA9 - Push pull output 50MHz (LED 1:ON 0:OFF)
+ * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
+ * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
+ * PA15 - Push pull output 50MHz (USB 1:ON 0:OFF)
+ * ------------------------ Default
+ * PAx - input with pull-up
+ */
+#define VAL_GPIO_LED_ODR 0xFFFFE7FF
+#define VAL_GPIO_LED_CRL 0x88888888 /* PA7...PA0 */
+#define VAL_GPIO_LED_CRH 0x38811838 /* PA15...PA8 */
+
+#define RCC_ENR_IOP_EN RCC_APB2ENR_IOPAEN
+#define RCC_RSTR_IOP_RST RCC_APB2RSTR_IOPARST
diff --git a/board/board-stbee-mini.h b/board/board-stbee-mini.h
index c8ee157..7faeaba 100644
--- a/board/board-stbee-mini.h
+++ b/board/board-stbee-mini.h
@@ -1,7 +1,6 @@
#define BOARD_NAME "STBee Mini"
#define BOARD_ID 0x1f341961
-#define FLASH_PAGE_SIZE 1024
#define STM32F10X_MD /* Medium-density device */
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
diff --git a/board/board-stbee.h b/board/board-stbee.h
index 643d666..8a762dc 100644
--- a/board/board-stbee.h
+++ b/board/board-stbee.h
@@ -1,8 +1,6 @@
#define BOARD_NAME "STBee"
#define BOARD_ID 0x945c37e8
-#define FLASH_PAGE_SIZE 2048
-
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 6
#define STM32_HSECLK 12000000
diff --git a/board/board-stm32-primer2.h b/board/board-stm32-primer2.h
index 8967958..579977a 100644
--- a/board/board-stm32-primer2.h
+++ b/board/board-stm32-primer2.h
@@ -1,8 +1,6 @@
#define BOARD_NAME "STM32 Primer2"
#define BOARD_ID 0x21e5798d
-#define FLASH_PAGE_SIZE 2048
-
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 6
#define STM32_HSECLK 12000000
diff --git a/board/board-stm32f0-discovery.h b/board/board-stm32f0-discovery.h
index 6a847ec..38ae214 100644
--- a/board/board-stm32f0-discovery.h
+++ b/board/board-stm32f0-discovery.h
@@ -9,8 +9,6 @@
/* __ARM_ARCH_6M__ */
-#define FLASH_PAGE_SIZE 1024
-
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 12
#define STM32_HSICLK 8000000
diff --git a/board/board-stm8s-discovery.h b/board/board-stm8s-discovery.h
index 002daca..80deb75 100644
--- a/board/board-stm8s-discovery.h
+++ b/board/board-stm8s-discovery.h
@@ -1,7 +1,6 @@
#define BOARD_NAME "STM8S Discovery"
#define BOARD_ID 0x2f0976bb
-#define FLASH_PAGE_SIZE 1024
#define STM32F10X_MD /* Medium-density device */
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
@@ -10,25 +9,9 @@
#define GPIO_LED_BASE GPIOA_BASE
#define GPIO_LED_SET_TO_EMIT 8
-#undef GPIO_USB_BASE
-#undef GPIO_USB_CLEAR_TO_ENABLE
+#undef GPIO_USB_BASE /* No external DISCONNECT/RENUM circuit. */
#define GPIO_OTHER_BASE GPIOB_BASE
-/* For pin-cir settings of Gnuk */
-#define TIMx TIM3
-#define INTR_REQ_TIM TIM3_IRQ
-#define AFIO_EXTICR_INDEX 1
-#define AFIO_EXTICR1_EXTIx_Py AFIO_EXTICR2_EXTI5_PB
-#define EXTI_PR EXTI_PR_PR5
-#define EXTI_IMR EXTI_IMR_MR5
-#define EXTI_FTSR_TR EXTI_FTSR_TR5
-#define INTR_REQ_EXTI EXTI9_5_IRQ
-#define ENABLE_RCC_APB1
-#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM3EN
-#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM3RST
-#define AFIO_MAPR_SOMETHING AFIO_MAPR_TIM3_REMAP_PARTIALREMAP
- /* Remap (PB4, PB5) -> (TIM3_CH1, TIM3_CH2) */
-
/*
* Port A setup.
* PA0 - input with pull-up. AN0
@@ -58,3 +41,19 @@
#define VAL_GPIO_OTHER_ODR 0xFFFFFFFE
#define VAL_GPIO_OTHER_CRL 0x88888888 /* PB7...PB0 */
#define VAL_GPIO_OTHER_CRH 0x88888888 /* PB15...PB8 */
+
+
+/* For pin-cir settings of Gnuk */
+#define TIMx TIM3
+#define INTR_REQ_TIM TIM3_IRQ
+#define AFIO_EXTICR_INDEX 1
+#define AFIO_EXTICR1_EXTIx_Py AFIO_EXTICR2_EXTI5_PB
+#define EXTI_PR EXTI_PR_PR5
+#define EXTI_IMR EXTI_IMR_MR5
+#define EXTI_FTSR_TR EXTI_FTSR_TR5
+#define INTR_REQ_EXTI EXTI9_5_IRQ
+#define ENABLE_RCC_APB1
+#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM3EN
+#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM3RST
+#define AFIO_MAPR_SOMETHING AFIO_MAPR_TIM3_REMAP_PARTIALREMAP
+ /* Remap (PB4, PB5) -> (TIM3_CH1, TIM3_CH2) */
generated by cgit v1.2.3 (git 2.39.1) at 2025-04-04 15:44:34 +0000