diff options
| author | NIIBE Yutaka <gniibe@fsij.org> | 2015-06-29 15:58:21 +0900 |
|---|---|---|
| committer | NIIBE Yutaka <gniibe@fsij.org> | 2015-06-29 15:58:21 +0900 |
| commit | 97b4471cee86b4d7efc23d272db80fb89c7c8ab2 (patch) | |
| tree | d066750a7976c25ae9e9c3f20ba8c7a91d5e7c6d /board/board-stm32-primer2.h | |
| parent | 15ae2d8b3242c74c736f7d723125d0b6de367805 (diff) | |
Make it clear LED is mandatory.
Diffstat (limited to 'board/board-stm32-primer2.h')
| -rw-r--r-- | board/board-stm32-primer2.h | 29 |
1 files changed, 21 insertions, 8 deletions
diff --git a/board/board-stm32-primer2.h b/board/board-stm32-primer2.h index 4cc5e8a..9f6cc67 100644 --- a/board/board-stm32-primer2.h +++ b/board/board-stm32-primer2.h @@ -4,8 +4,24 @@ #define STM32_PLLMUL_VALUE 6 #define STM32_HSECLK 12000000 -#define GPIO_USB_CLEAR_TO_ENABLE 3 +#define GPIO_LED_BASE GPIOE_BASE #define GPIO_LED_CLEAR_TO_EMIT 0 +#define GPIO_USB_BASE GPIOD_BASE +#define GPIO_USB_CLEAR_TO_ENABLE 3 +#define GPIO_OTHER_BASE GPIOA_BASE + +/* + * Port A setup. + * PA0 - input with pull-up. AN0 + * PA1 - input with pull-up. AN1 + * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM) + * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP) + * ------------------------ Default + * PAx - input with pull-up + */ +#define VAL_GPIO_OTHER_ODR 0xFFFFE7FF +#define VAL_GPIO_OTHER_CRL 0x88888888 /* PA7...PA0 */ +#define VAL_GPIO_OTHER_CRH 0x88811888 /* PA15...PA8 */ /* * Port D setup. @@ -13,24 +29,21 @@ * ------------------------ Default * PDx - input with pull-up */ -#define VAL_GPIO_ODR 0xFFFFFFFF -#define VAL_GPIO_CRL 0x88883888 /* PD7...PD0 */ -#define VAL_GPIO_CRH 0x88888888 /* PD15...PD8 */ +#define VAL_GPIO_USB_ODR 0xFFFFFFFF +#define VAL_GPIO_USB_CRL 0x88883888 /* PD7...PD0 */ +#define VAL_GPIO_USB_CRH 0x88888888 /* PD15...PD8 */ /* * Port E setup. * PE0 - Push pull output (LED 1:ON 0:OFF) * PE1 - Push pull output (LED 1:ON 0:OFF) * ------------------------ Default - * PCx - input with pull-up + * PEx - input with pull-up */ #define VAL_GPIO_LED_ODR 0xFFFFFFFF #define VAL_GPIO_LED_CRL 0x88888833 /* PE7...PE0 */ #define VAL_GPIO_LED_CRH 0x88888888 /* PE15...PE8 */ -#define GPIO_USB_BASE GPIOD_BASE -#define GPIO_LED_BASE GPIOE_BASE - #define RCC_ENR_IOP_EN \ (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPDEN | RCC_APB2ENR_IOPEEN) #define RCC_RSTR_IOP_RST \ |