diff options
| author | NIIBE Yutaka <gniibe@fsij.org> | 2015-07-13 16:45:32 +0900 |
|---|---|---|
| committer | NIIBE Yutaka <gniibe@fsij.org> | 2015-07-13 16:45:32 +0900 |
| commit | 3ba8234cecde90467fb75d72055fa0c226ed16df (patch) | |
| tree | f6c184a72d8759a59b3b4db109fe1bfaab6d8032 /board/board-stm32-primer2.h | |
| parent | 2bb0e0de5d7d25d0bb036e6ee9cc0c94b62375ec (diff) | |
sys_board and stm32 primer2
Diffstat (limited to 'board/board-stm32-primer2.h')
| -rw-r--r-- | board/board-stm32-primer2.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/board/board-stm32-primer2.h b/board/board-stm32-primer2.h index 9f6cc67..2d56f90 100644 --- a/board/board-stm32-primer2.h +++ b/board/board-stm32-primer2.h @@ -1,3 +1,5 @@ +#define BOARD_NAME "STM32 Primer2" + #define FLASH_PAGE_SIZE 2048 #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -5,7 +7,7 @@ #define STM32_HSECLK 12000000 #define GPIO_LED_BASE GPIOE_BASE -#define GPIO_LED_CLEAR_TO_EMIT 0 +#define GPIO_LED_SET_TO_EMIT 0 #define GPIO_USB_BASE GPIOD_BASE #define GPIO_USB_CLEAR_TO_ENABLE 3 #define GPIO_OTHER_BASE GPIOA_BASE @@ -14,12 +16,13 @@ * Port A setup. * PA0 - input with pull-up. AN0 * PA1 - input with pull-up. AN1 + * PA8 - Input with pull-down (PBUTTON). * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM) * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP) * ------------------------ Default * PAx - input with pull-up */ -#define VAL_GPIO_OTHER_ODR 0xFFFFE7FF +#define VAL_GPIO_OTHER_ODR 0xFFFFE6FF #define VAL_GPIO_OTHER_CRL 0x88888888 /* PA7...PA0 */ #define VAL_GPIO_OTHER_CRH 0x88811888 /* PA15...PA8 */ @@ -37,10 +40,14 @@ * Port E setup. * PE0 - Push pull output (LED 1:ON 0:OFF) * PE1 - Push pull output (LED 1:ON 0:OFF) + * PE3 - Input with pull-down (JOYSTICK L). + * PE4 - Input with pull-down (JOYSTICK R). + * PE5 - Input with pull-down (JOYSTICK U). + * PE6 - Input with pull-down (JOYSTICK D). * ------------------------ Default * PEx - input with pull-up */ -#define VAL_GPIO_LED_ODR 0xFFFFFFFF +#define VAL_GPIO_LED_ODR 0xFFFFFF87 #define VAL_GPIO_LED_CRL 0x88888833 /* PE7...PE0 */ #define VAL_GPIO_LED_CRH 0x88888888 /* PE15...PE8 */ |