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authorNIIBE Yutaka <gniibe@fsij.org>2016-04-07 14:36:41 +0900
committerNIIBE Yutaka <gniibe@fsij.org>2016-04-07 14:36:41 +0900
commit674c19c495feb6cba9d87515a2ae9daed84e754f (patch)
tree655ebc496b70a8956f51b240be3156e3f7c25524 /ChangeLog
parent35426d7715ed548c043678f068ca881f51ecf592 (diff)
SVC is required for Cortex-M3
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2016-04-07 Niibe Yutaka <gniibe@fsij.org>
+ * chopstx.c (chx_cpu_sched_lock, chx_cpu_sched_unlock): Use SVC
+ for Cortex-M3, because of ICI/IT of ESPR.
+ (chx_sched): Invoke svc for Cortex-M3.
+ (preempt, svc): Change back for Cortex-M3.
+
+2016-04-07 Niibe Yutaka <gniibe@fsij.org>
+
* entry.c (vector_table): Since IDLE thread runs with PSP now, use
different value for MSP.