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authorAnup Patel <anup.patel@wdc.com>2021-07-23 14:09:43 +0530
committerAnup Patel <anup@brainfault.org>2021-08-14 09:02:33 +0530
commite0d1b9db8abd8288afbaa4f93a4ace6a9b6f0100 (patch)
treea404340f4c146ae45de2ed5d50a4427de8e78672 /platform/template
parent47a47654e8d3997b059d11bb8845ed0037e88c8e (diff)
lib: utils/timer: Allow separate base addresses for MTIME and MTIMECMP
We extend the ACLINT library to support separate base addresses for MTIME and MTIMECMP registers. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
Diffstat (limited to 'platform/template')
-rw-r--r--platform/template/platform.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 3f09d98..4528822 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -43,8 +43,12 @@ static struct aclint_mswi_data mswi = {
};
static struct aclint_mtimer_data mtimer = {
- .addr = PLATFORM_ACLINT_MTIMER_ADDR,
- .size = ACLINT_MTIMER_SIZE,
+ .mtime_addr = PLATFORM_ACLINT_MTIMER_ADDR +
+ ACLINT_DEFAULT_MTIME_OFFSET,
+ .mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
+ .mtimecmp_addr = PLATFORM_ACLINT_MTIMER_ADDR +
+ ACLINT_DEFAULT_MTIMECMP_OFFSET,
+ .mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
.first_hartid = 0,
.hart_count = PLATFORM_HART_COUNT,
.has_64bit_mmio = TRUE,