diff options
| author | Anup Patel <anup.patel@wdc.com> | 2021-05-21 16:33:33 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2021-06-24 09:39:55 +0530 |
| commit | a731c7e36988c3308e1978ecde491f2f6182d490 (patch) | |
| tree | e6d966c4cc40d92863326914bc1e8b736bcf93c6 /platform/fpga | |
| parent | 03d6bb51ba96a16a8ac9a2fcbaebec9f6c31d900 (diff) | |
platform: Replace CLINT library usage with ACLINT library
The ACLINT devices are backward compatible with SiFive CLINT
so we replace all CLINT library usage in various platforms
with ACLINT library. As a result of this replacement, the
CLINT library is not used by any part of OpenSBI hence we
remove it.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Diffstat (limited to 'platform/fpga')
| -rw-r--r-- | platform/fpga/ariane/platform.c | 27 | ||||
| -rw-r--r-- | platform/fpga/openpiton/platform.c | 33 |
2 files changed, 44 insertions, 16 deletions
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c index 42e43fa..0b47aa0 100644 --- a/platform/fpga/ariane/platform.c +++ b/platform/fpga/ariane/platform.c @@ -12,9 +12,10 @@ #include <sbi/sbi_hart.h> #include <sbi/sbi_platform.h> #include <sbi_utils/fdt/fdt_fixup.h> +#include <sbi_utils/ipi/aclint_mswi.h> #include <sbi_utils/irqchip/plic.h> #include <sbi_utils/serial/uart8250.h> -#include <sbi_utils/sys/clint.h> +#include <sbi_utils/timer/aclint_mtimer.h> #define ARIANE_UART_ADDR 0x10000000 #define ARIANE_UART_FREQ 50000000 @@ -25,14 +26,26 @@ #define ARIANE_PLIC_NUM_SOURCES 3 #define ARIANE_HART_COUNT 1 #define ARIANE_CLINT_ADDR 0x2000000 +#define ARIANE_ACLINT_MSWI_ADDR (ARIANE_CLINT_ADDR + \ + CLINT_MSWI_OFFSET) +#define ARIANE_ACLINT_MTIMER_ADDR (ARIANE_CLINT_ADDR + \ + CLINT_MTIMER_OFFSET) static struct plic_data plic = { .addr = ARIANE_PLIC_ADDR, .num_src = ARIANE_PLIC_NUM_SOURCES, }; -static struct clint_data clint = { - .addr = ARIANE_CLINT_ADDR, +static struct aclint_mswi_data mswi = { + .addr = ARIANE_ACLINT_MSWI_ADDR, + .size = ACLINT_MSWI_SIZE, + .first_hartid = 0, + .hart_count = ARIANE_HART_COUNT, +}; + +static struct aclint_mtimer_data mtimer = { + .addr = ARIANE_ACLINT_MTIMER_ADDR, + .size = ACLINT_MTIMER_SIZE, .first_hartid = 0, .hart_count = ARIANE_HART_COUNT, .has_64bit_mmio = TRUE, @@ -123,12 +136,12 @@ static int ariane_ipi_init(bool cold_boot) int ret; if (cold_boot) { - ret = clint_cold_ipi_init(&clint); + ret = aclint_mswi_cold_init(&mswi); if (ret) return ret; } - return clint_warm_ipi_init(); + return aclint_mswi_warm_init(); } /* @@ -139,12 +152,12 @@ static int ariane_timer_init(bool cold_boot) int ret; if (cold_boot) { - ret = clint_cold_timer_init(&clint, NULL); + ret = aclint_mtimer_cold_init(&mtimer, NULL); if (ret) return ret; } - return clint_warm_timer_init(); + return aclint_mtimer_warm_init(); } /* diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c index 894bfdc..57ec21b 100644 --- a/platform/fpga/openpiton/platform.c +++ b/platform/fpga/openpiton/platform.c @@ -12,9 +12,10 @@ #include <sbi/sbi_platform.h> #include <sbi_utils/fdt/fdt_helper.h> #include <sbi_utils/fdt/fdt_fixup.h> +#include <sbi_utils/ipi/aclint_mswi.h> #include <sbi_utils/irqchip/plic.h> #include <sbi_utils/serial/uart8250.h> -#include <sbi_utils/sys/clint.h> +#include <sbi_utils/timer/aclint_mtimer.h> #define OPENPITON_DEFAULT_UART_ADDR 0xfff0c2c000 #define OPENPITON_DEFAULT_UART_FREQ 60000000 @@ -25,6 +26,10 @@ #define OPENPITON_DEFAULT_PLIC_NUM_SOURCES 2 #define OPENPITON_DEFAULT_HART_COUNT 3 #define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000 +#define OPENPITON_DEFAULT_ACLINT_MSWI_ADDR \ + (OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MSWI_OFFSET) +#define OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR \ + (OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MTIMER_OFFSET) static struct platform_uart_data uart = { OPENPITON_DEFAULT_UART_ADDR, @@ -36,8 +41,16 @@ static struct plic_data plic = { .num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES, }; -static struct clint_data clint = { - .addr = OPENPITON_DEFAULT_CLINT_ADDR, +static struct aclint_mswi_data mswi = { + .addr = OPENPITON_DEFAULT_ACLINT_MSWI_ADDR, + .size = ACLINT_MSWI_SIZE, + .first_hartid = 0, + .hart_count = OPENPITON_DEFAULT_HART_COUNT, +}; + +static struct aclint_mtimer_data mtimer = { + .addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR, + .size = ACLINT_MTIMER_SIZE, .first_hartid = 0, .hart_count = OPENPITON_DEFAULT_HART_COUNT, .has_64bit_mmio = TRUE, @@ -67,8 +80,10 @@ static int openpiton_early_init(bool cold_boot) plic = plic_data; rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0"); - if (!rc) - clint.addr = clint_addr; + if (!rc) { + mswi.addr = clint_addr; + mtimer.addr = clint_addr + CLINT_MTIMER_OFFSET; + } return 0; } @@ -149,12 +164,12 @@ static int openpiton_ipi_init(bool cold_boot) int ret; if (cold_boot) { - ret = clint_cold_ipi_init(&clint); + ret = aclint_mswi_cold_init(&mswi); if (ret) return ret; } - return clint_warm_ipi_init(); + return aclint_mswi_warm_init(); } /* @@ -165,12 +180,12 @@ static int openpiton_timer_init(bool cold_boot) int ret; if (cold_boot) { - ret = clint_cold_timer_init(&clint, NULL); + ret = aclint_mtimer_cold_init(&mtimer, NULL); if (ret) return ret; } - return clint_warm_timer_init(); + return aclint_mtimer_warm_init(); } /* |