diff options
| author | Anup Patel <anup.patel@wdc.com> | 2020-05-05 11:46:25 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-05-07 09:08:26 +0530 |
| commit | dc38929dfb441cbecb4e31a299b463bac11d02cf (patch) | |
| tree | 73b55b2c283c54634ef99a343ec5c745e6f82baf /lib/sbi/sbi_init.c | |
| parent | 5338679ff043d68f5c26265de144e5ec54109724 (diff) | |
lib: sbi: Improve misa_string() implementation
The RISC-V ISA string does not follow alphabetical order. Instead,
we have a RISC-V specific ordering of extensions in the RISC-V ISA
string. This patch improves misa_string() implementation to return
a valid RISC-V ISA string.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Diffstat (limited to 'lib/sbi/sbi_init.c')
| -rw-r--r-- | lib/sbi/sbi_init.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c index 629eb83..bf4b453 100644 --- a/lib/sbi/sbi_init.c +++ b/lib/sbi/sbi_init.c @@ -53,15 +53,15 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid) sbi_printf("Error %d getting MISA XLEN\n", xlen); sbi_hart_hang(); } - xlen = 16 * (1 << xlen); - misa_string(str, sizeof(str)); + misa_string(xlen, str, sizeof(str)); /* Platform details */ sbi_printf("Platform Name : %s\n", sbi_platform_name(plat)); - sbi_printf("Platform HART Features : RV%d%s\n", xlen, str); sbi_printf("Platform HART Count : %u\n", sbi_platform_hart_count(plat)); - sbi_printf("Current HART ID : %u\n", hartid); + /* Boot HART details */ + sbi_printf("Boot HART ID : %u\n", hartid); + sbi_printf("Boot HART ISA : %s\n", str); /* Firmware details */ sbi_printf("Firmware Base : 0x%lx\n", scratch->fw_start); sbi_printf("Firmware Size : %d KB\n", |