diff options
| author | Anup Patel <anup.patel@wdc.com> | 2020-05-05 11:46:25 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-05-07 09:08:26 +0530 |
| commit | dc38929dfb441cbecb4e31a299b463bac11d02cf (patch) | |
| tree | 73b55b2c283c54634ef99a343ec5c745e6f82baf /lib/sbi/riscv_asm.c | |
| parent | 5338679ff043d68f5c26265de144e5ec54109724 (diff) | |
lib: sbi: Improve misa_string() implementation
The RISC-V ISA string does not follow alphabetical order. Instead,
we have a RISC-V specific ordering of extensions in the RISC-V ISA
string. This patch improves misa_string() implementation to return
a valid RISC-V ISA string.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Diffstat (limited to 'lib/sbi/riscv_asm.c')
| -rw-r--r-- | lib/sbi/riscv_asm.c | 48 |
1 files changed, 46 insertions, 2 deletions
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c index 24f8771..3c3a5ad 100644 --- a/lib/sbi/riscv_asm.c +++ b/lib/sbi/riscv_asm.c @@ -17,8 +17,13 @@ int misa_extension_imp(char ext) { unsigned long misa = csr_read(CSR_MISA); - if (misa) - return misa & (1 << (ext - 'A')); + if (misa) { + if ('A' <= ext && ext <= 'Z') + return misa & (1 << (ext - 'A')); + if ('a' <= ext && ext <= 'z') + return misa & (1 << (ext - 'a')); + return 0; + } return sbi_platform_misa_extension(sbi_platform_thishart_ptr(), ext); } @@ -44,6 +49,45 @@ int misa_xlen(void) return r ? r : -1; } +void misa_string(int xlen, char *out, unsigned int out_sz) +{ + unsigned int i, pos = 0; + const char valid_isa_order[] = "iemafdqclbjtpvnsuhkorwxyzg"; + + if (!out) + return; + + if (5 <= (out_sz - pos)) { + out[pos++] = 'r'; + out[pos++] = 'v'; + switch (xlen) { + case 1: + out[pos++] = '3'; + out[pos++] = '2'; + break; + case 2: + out[pos++] = '6'; + out[pos++] = '4'; + break; + case 3: + out[pos++] = '1'; + out[pos++] = '2'; + out[pos++] = '8'; + break; + default: + return; + } + } + + for (i = 0; i < array_size(valid_isa_order) && (pos < out_sz); i++) { + if (misa_extension_imp(valid_isa_order[i])) + out[pos++] = valid_isa_order[i]; + } + + if (pos < out_sz) + out[pos++] = '\0'; +} + unsigned long csr_read_num(int csr_num) { unsigned long ret = 0; |