diff options
| author | Liush <liush.damon@gmail.com> | 2020-06-19 11:55:19 +0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-06-20 08:47:11 +0530 |
| commit | 9bd5f8f17d31f8989525643a04da87d090fe3033 (patch) | |
| tree | 1b5fd5df76e41be87991fbefdbda4d8f42796f12 /lib/sbi/riscv_asm.c | |
| parent | db56ef367cd6dc9dab94076f4c8a3fa9d91bd1f2 (diff) | |
lib: sbi: Fix 32/64 bits variable compatibility
On RV64,"unsigned long" is 64bit and "unsigned int" is 32bit. So in
function "pmp_get" and "pmp_set", if "pmpcfg_shift >= 32", "0xff << pmpcfg_shift"
will go beyond "unsigned int" width. This patch tries to fix this issue.
In function 'pmp_get':
cfgmask = (0xff << pmpcfg_shift);
-->
cfgmask = (0xffUL << pmpcfg_shift);
In function 'pmp_set':
cfgmask = ~(0xff << pmpcfg_shift);
-->
cfgmask = ~(0xffUL << pmpcfg_shift);
Signed-off-by: Liush <liush.damon@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'lib/sbi/riscv_asm.c')
| -rw-r--r-- | lib/sbi/riscv_asm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c index 3c3a5ad..6dfebd9 100644 --- a/lib/sbi/riscv_asm.c +++ b/lib/sbi/riscv_asm.c @@ -268,7 +268,7 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr, /* encode PMP config */ prot |= (log2len == PMP_SHIFT) ? PMP_A_NA4 : PMP_A_NAPOT; - cfgmask = ~(0xff << pmpcfg_shift); + cfgmask = ~(0xffUL << pmpcfg_shift); pmpcfg = (csr_read_num(pmpcfg_csr) & cfgmask); pmpcfg |= ((prot << pmpcfg_shift) & ~cfgmask); @@ -320,7 +320,7 @@ int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out, return SBI_ENOTSUPP; /* decode PMP config */ - cfgmask = (0xff << pmpcfg_shift); + cfgmask = (0xffUL << pmpcfg_shift); pmpcfg = csr_read_num(pmpcfg_csr) & cfgmask; prot = pmpcfg >> pmpcfg_shift; |