diff options
| author | Atish Patra <atish.patra@wdc.com> | 2019-02-12 18:32:06 -0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2019-02-14 09:31:18 +0530 |
| commit | 70a474d2c24dc3e0c8841e6ef5cc96797deadbf5 (patch) | |
| tree | 0c1456134e4815aadea0f523d7fb570454e23d0d /include/sbi/riscv_fp.h | |
| parent | 4cb4d46875dd0f0dd01d3ff1fee4f0d6cefb857a (diff) | |
lib: Use CSR_<FOO> instead of <foo> for csr_*()
Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.
Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Diffstat (limited to 'include/sbi/riscv_fp.h')
| -rw-r--r-- | include/sbi/riscv_fp.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h index 7143023..9e2e082 100644 --- a/include/sbi/riscv_fp.h +++ b/include/sbi/riscv_fp.h @@ -43,12 +43,12 @@ ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \ ulong tmp; \ asm volatile ("1: auipc %0, %%pcrel_hi(put_f64_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp) : "r"(value), "r"(offset) : "t0"); }) -#define GET_FCSR() csr_read(fcsr) -#define SET_FCSR(value) csr_write(fcsr, (value)) -#define GET_FRM() csr_read(frm) -#define SET_FRM(value) csr_write(frm, (value)) -#define GET_FFLAGS() csr_read(fflags) -#define SET_FFLAGS(value) csr_write(fflags, (value)) +#define GET_FCSR() csr_read(CSR_FCSR) +#define SET_FCSR(value) csr_write(CSR_FCSR, (value)) +#define GET_FRM() csr_read(CSR_FRM) +#define SET_FRM(value) csr_write(CSR_FRM, (value)) +#define GET_FFLAGS() csr_read(CSR_FFLAGS) +#define SET_FFLAGS(value) csr_write(CSR_FFLAGS, (value)) #define SET_FS_DIRTY() ((void) 0) |