diff options
| author | Anup Patel <anup.patel@wdc.com> | 2018-12-31 12:37:28 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2019-01-02 09:57:12 +0530 |
| commit | dc7be34d523f93d2834f4aff49d640cdec16a509 (patch) | |
| tree | 1c4951680b3eb2347701a29adf7d91426961735d /include/sbi/riscv_asm.h | |
| parent | 5ed3cf37073125a38ac839ad11de687f20286b33 (diff) | |
include: Move RISCV_TRAP_REGS_xyz defines to sbi_trap.h
The struct sbi_trap_regs related defines RISCV_TRAP_REGS_xyz should
be in sbi_trap.h so that we can keep these defines in-sync with changes
in struct sbi_trap_regs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'include/sbi/riscv_asm.h')
| -rw-r--r-- | include/sbi/riscv_asm.h | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h index 6fd7d5d..6e1bff7 100644 --- a/include/sbi/riscv_asm.h +++ b/include/sbi/riscv_asm.h @@ -69,46 +69,6 @@ #error "Unexpected __SIZEOF_SHORT__" #endif -#define RISCV_TRAP_REGS_zero 0 -#define RISCV_TRAP_REGS_ra 1 -#define RISCV_TRAP_REGS_sp 2 -#define RISCV_TRAP_REGS_gp 3 -#define RISCV_TRAP_REGS_tp 4 -#define RISCV_TRAP_REGS_t0 5 -#define RISCV_TRAP_REGS_t1 6 -#define RISCV_TRAP_REGS_t2 7 -#define RISCV_TRAP_REGS_s0 8 -#define RISCV_TRAP_REGS_s1 9 -#define RISCV_TRAP_REGS_a0 10 -#define RISCV_TRAP_REGS_a1 11 -#define RISCV_TRAP_REGS_a2 12 -#define RISCV_TRAP_REGS_a3 13 -#define RISCV_TRAP_REGS_a4 14 -#define RISCV_TRAP_REGS_a5 15 -#define RISCV_TRAP_REGS_a6 16 -#define RISCV_TRAP_REGS_a7 17 -#define RISCV_TRAP_REGS_s2 18 -#define RISCV_TRAP_REGS_s3 19 -#define RISCV_TRAP_REGS_s4 20 -#define RISCV_TRAP_REGS_s5 21 -#define RISCV_TRAP_REGS_s6 22 -#define RISCV_TRAP_REGS_s7 23 -#define RISCV_TRAP_REGS_s8 24 -#define RISCV_TRAP_REGS_s9 25 -#define RISCV_TRAP_REGS_s10 26 -#define RISCV_TRAP_REGS_s11 27 -#define RISCV_TRAP_REGS_t3 28 -#define RISCV_TRAP_REGS_t4 29 -#define RISCV_TRAP_REGS_t5 30 -#define RISCV_TRAP_REGS_t6 31 -#define RISCV_TRAP_REGS_mepc 32 -#define RISCV_TRAP_REGS_mstatus 33 -#define RISCV_TRAP_REGS_last 34 - -#define RISCV_TRAP_REGS_OFFSET(x) \ - ((RISCV_TRAP_REGS_##x) * __SIZEOF_POINTER__) -#define RISCV_TRAP_REGS_SIZE RISCV_TRAP_REGS_OFFSET(last) - #ifndef __ASSEMBLY__ #define csr_swap(csr, val) \ |