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| author | Anup Patel <anup.patel@wdc.com> | 2020-07-29 17:10:16 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-08-04 08:48:41 +0530 |
| commit | 937caee0833115f69d697ca190001ba0aa5c7368 (patch) | |
| tree | 3b2065c21e86a337b34489dda83b0a1ee6538be9 /firmware | |
| parent | 2cfd2fc9048806353298a1b967abf985901e36e8 (diff) | |
lib: sbi_misaligned_ldst: Determine transformed instruction length correctly
If MTINST[0:0] bit is 1 then we have transformed instruction encoding
in MTINST CSR. For transformed instructions, if the MTINST[1:1] bit
is Zero then original trapped instruction was a 16bit instruction
which was converted to 32bit instruction at time of taking trap.
We should use MTINST[1:1] bit to determine correct instruction length
of transformed instruction.
This patch updates misaligned load/store emulation as-per above.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Diffstat (limited to 'firmware')
0 files changed, 0 insertions, 0 deletions