diff options
author | Atish Patra <atish.patra@wdc.com> | 2019-02-13 11:03:53 -0800 |
---|---|---|
committer | Anup Patel <anup@brainfault.org> | 2019-02-14 09:31:18 +0530 |
commit | 35e617385f5c6278ee83434b9594d07731993742 (patch) | |
tree | 92beb4902e02593b745913c2d29fc233ca57ea7f /firmware/payloads | |
parent | 28d1dd2430a80d350c9a53a1f5be08de8c3f9dc1 (diff) |
firmware: Use CSR_<FOO> instead of <foo> for csr*
Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Diffstat (limited to 'firmware/payloads')
-rw-r--r-- | firmware/payloads/test_head.S | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/firmware/payloads/test_head.S b/firmware/payloads/test_head.S index 4454e46..ef1405a 100644 --- a/firmware/payloads/test_head.S +++ b/firmware/payloads/test_head.S @@ -7,6 +7,7 @@ * Anup Patel <anup.patel@wdc.com> */ +#include <sbi/riscv_encoding.h> #define __ASM_STR(x) x #if __riscv_xlen == 64 @@ -48,12 +49,12 @@ _bss_zero: _start_warm: /* Disable and clear all interrupts */ - csrw sie, zero - csrw sip, zero + csrw CSR_SIE, zero + csrw CSR_SIP, zero /* Setup exception vectors */ la a3, _start_hang - csrw stvec, a3 + csrw CSR_STVEC, a3 /* Setup stack */ la a3, _payload_end |