diff options
| author | Atish Patra <atish.patra@wdc.com> | 2021-11-08 10:53:07 -0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2021-11-11 17:57:17 +0530 |
| commit | b8845e420453531f92414b91828c58d6d4f90fff (patch) | |
| tree | 45282920582d1675f0dda1ed673c48e8f3a490bf | |
| parent | 15906a3984f7c22b81802bcadaa4e517f4f685c8 (diff) | |
lib: sbi: Fix initial value mask while updating the counters
The first 32 bits of the initial value for the counter should be
preserved while updating the mhpmcounter for 32bit.
Fixes: 13d40f21d588e ("lib: sbi: Add PMU support")
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
| -rw-r--r-- | lib/sbi/sbi_pmu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c index e0303a7..a0eb359 100644 --- a/lib/sbi/sbi_pmu.c +++ b/lib/sbi/sbi_pmu.c @@ -270,7 +270,7 @@ static void pmu_ctr_write_hw(uint32_t cidx, uint64_t ival) { #if __riscv_xlen == 32 csr_write_num(CSR_MCYCLE + cidx, 0); - csr_write_num(CSR_MCYCLE + cidx, ival & 0xFFFF); + csr_write_num(CSR_MCYCLE + cidx, ival & 0xFFFFFFFF); csr_write_num(CSR_MCYCLEH + cidx, ival >> BITS_PER_LONG); #else csr_write_num(CSR_MCYCLE + cidx, ival); |