diff options
Diffstat (limited to 'example-led')
| -rw-r--r-- | example-led/Makefile | 2 | ||||
| -rw-r--r-- | example-led/sys.c | 15 |
2 files changed, 9 insertions, 8 deletions
diff --git a/example-led/Makefile b/example-led/Makefile index 14ff7ff..89cbe21 100644 --- a/example-led/Makefile +++ b/example-led/Makefile @@ -13,7 +13,7 @@ LD = $(CROSS)gcc OBJCOPY = $(CROSS)objcopy # MCU = cortex-m3 -MCU = cortex-m0 # -save-temps +MCU = cortex-m0 CWARN = -Wall -Wextra -Wstrict-prototypes DEFS = -DHAVE_SYS_H -DFREE_STANDING -DMHZ=48 # DEFS = -DFREE_STANDING -DHAVE_SYS_H -DBUSY_LOOP -DCHX_FLAGS_MAIN=CHOPSTX_SCHED_RR diff --git a/example-led/sys.c b/example-led/sys.c index c86a08e..84584f1 100644 --- a/example-led/sys.c +++ b/example-led/sys.c @@ -23,6 +23,7 @@ #define USB_LP_CAN1_RX0_IRQn 20 #define STM32_USB_IRQ_PRIORITY 11 + #define STM32_SW_HSI (0 << 0) #define STM32_SW_PLL (2 << 0) #define STM32_PLLSRC_HSI (0 << 16) @@ -46,7 +47,7 @@ #define STM32_MCO_NOCLOCK (0 << 24) -#if MCU_STM32F0 +#if defined(MCU_STM32F0) #define STM32_PPRE1 STM32_PPRE1_DIV1 #define STM32_PLLSRC STM32_PLLSRC_HSI #define STM32_FLASHBITS 0x00000011 @@ -117,7 +118,7 @@ struct RCC { volatile uint32_t APB1ENR; volatile uint32_t BDCR; volatile uint32_t CSR; -#if MCU_STM32F0 +#if defined(MCU_STM32F0) volatile uint32_t AHBRSTR; volatile uint32_t CFGR2; volatile uint32_t CFGR3; @@ -214,7 +215,7 @@ clock_init (void) while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) ; -#if !MCU_STM32F0 +#if !defined(MCU_STM32F0) /* HSE setup */ RCC->CR |= RCC_CR_HSEON; while (!(RCC->CR & RCC_CR_HSERDY)) @@ -246,7 +247,7 @@ clock_init (void) while ((RCC->CFGR & RCC_CFGR_SWS) != (STM32_SW << 2)) ; -#if MCU_STM32F0 +#if defined(MCU_STM32F0) RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; RCC->APB2RSTR = RCC_APB2RSTR_SYSCFGRST; RCC->APB2RSTR = 0; @@ -257,7 +258,7 @@ clock_init (void) } -#if MCU_STM32F0 +#if defined(MCU_STM32F0) struct GPIO { volatile uint32_t MODER; volatile uint16_t OTYPER; @@ -337,7 +338,7 @@ static void gpio_init (void) { /* Enable GPIO clock. */ -#if MCU_STM32F0 +#if defined(MCU_STM32F0) RCC->AHBENR |= RCC_ENR_IOP_EN; RCC->AHBRSTR = RCC_RSTR_IOP_RST; RCC->AHBRSTR = 0; @@ -698,7 +699,7 @@ reset (void) * This code may not be at the start of flash ROM, because of DFU. * So, we take the address from PC. */ -#if __ARM_ARCH_6M__ +#if defined(__ARM_ARCH_6M__) asm volatile ("cpsid i\n\t" /* Mask all interrupts. */ "ldr r0, 1f\n\t" /* r0 = RAM start */ "mov r1, pc\n\t" /* r1 = (PC + 0x0400) & ~0x03ff */ |