From 315a87710fd16009ad709445d5cf55cc6cca2e69 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 16 Mar 2020 10:29:34 +0530
Subject: platform: sifive/fu540: Remove FU540_ENABLED_HART_MASK option

The FU540_ENABLED_HART_MASK compile time option was added for initial
bring-up on SiFive Unleashed. This option is redundant now because
disabled_hart_mask is already removed. Based on this rationale, we
remove FU540_ENABLED_HART_MASK compile time option.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/sifive/fu540/objects.mk |  3 ---
 platform/sifive/fu540/platform.c | 10 ----------
 2 files changed, 13 deletions(-)

(limited to 'platform')

diff --git a/platform/sifive/fu540/objects.mk b/platform/sifive/fu540/objects.mk
index f09a305..e0d0585 100644
--- a/platform/sifive/fu540/objects.mk
+++ b/platform/sifive/fu540/objects.mk
@@ -8,6 +8,3 @@
 #
 
 platform-objs-y += platform.o
-ifdef FU540_ENABLED_HART_MASK
-platform-genflags-y += -DFU540_ENABLED_HART_MASK=$(FU540_ENABLED_HART_MASK)
-endif
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 6714cd5..6d43e92 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -35,16 +35,6 @@
 #define FU540_UART1_ADDR			0x10011000
 #define FU540_UART_BAUDRATE			115200
 
-/**
- * The FU540 SoC has 5 HARTs but HART ID 0 doesn't have S mode. enable only
- * HARTs 1 to 4.
- */
-#ifndef FU540_ENABLED_HART_MASK
-#define FU540_ENABLED_HART_MASK	(1 << 1 | 1 << 2 | 1 << 3 | 1 << 4)
-#endif
-
-#define FU540_HARITD_DISABLED			~(FU540_ENABLED_HART_MASK)
-
 /* PRCI clock related macros */
 //TODO: Do we need a separate driver for this ?
 #define FU540_PRCI_BASE_ADDR			0x10000000
-- 
cgit v1.2.3