#define STM32_PLLXTPRE			STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE		6
#define STM32_HSECLK			12000000

#define GPIO_USB_SET_TO_ENABLE		10
#define GPIO_LED_SET_TO_EMIT		0

#define VAL_GPIO_ODR            0xFFFFE7FD
#define VAL_GPIO_CRL            0xBBB38888      /*  PA7...PA0 */
#define VAL_GPIO_CRH            0x88811388      /* PA15...PA8 */

#define VAL_GPIO_LED_ODR            0xFFFFFFFF
#define VAL_GPIO_LED_CRL            0x88888883      /*  PA7...PA0 */
#define VAL_GPIO_LED_CRH            0x88888888      /* PA15...PA8 */

#define GPIO_USB_BASE	GPIOA_BASE
#define GPIO_LED_BASE	GPIOB_BASE

#define RCC_APB2ENR_IOP_EN	(RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
#define RCC_APB2RSTR_IOP_RST	(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)

/* NeuG settings for ADC2.  */
#define NEUG_ADC_SETTING2_SMPR1 0
#define NEUG_ADC_SETTING2_SMPR2 ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5)    \
                              | ADC_SMPR2_SMP_AN9(ADC_SAMPLE_1P5)
#define NEUG_ADC_SETTING2_SQR3  ADC_SQR3_SQ1_N(ADC_CHANNEL_IN0)      \
                              | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN9)
#define NEUG_ADC_SETTING2_NUM_CHANNELS 2