From b2986480794bc44a6e8435a819341d5f3afd2752 Mon Sep 17 00:00:00 2001
From: NIIBE Yutaka <gniibe@fsij.org>
Date: Mon, 22 Jun 2015 16:18:44 +0900
Subject: Kaz Kojima add STM32 Primer2 support

---
 board/board-stm32-primer2.h | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 board/board-stm32-primer2.h

(limited to 'board/board-stm32-primer2.h')

diff --git a/board/board-stm32-primer2.h b/board/board-stm32-primer2.h
new file mode 100644
index 0000000..4cc5e8a
--- /dev/null
+++ b/board/board-stm32-primer2.h
@@ -0,0 +1,39 @@
+#define FLASH_PAGE_SIZE 2048
+
+#define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE              6
+#define STM32_HSECLK                    12000000
+
+#define GPIO_USB_CLEAR_TO_ENABLE        3
+#define GPIO_LED_CLEAR_TO_EMIT          0
+
+/*
+ * Port D setup.
+ * PD3  - Push pull output 50MHz (USB 1:ON 0:OFF)
+ * ------------------------ Default
+ * PDx  - input with pull-up
+ */
+#define VAL_GPIO_ODR            0xFFFFFFFF
+#define VAL_GPIO_CRL            0x88883888      /*  PD7...PD0 */
+#define VAL_GPIO_CRH            0x88888888      /* PD15...PD8 */
+
+/*
+ * Port E setup.
+ * PE0  - Push pull output   (LED 1:ON 0:OFF)
+ * PE1  - Push pull output   (LED 1:ON 0:OFF)
+ * ------------------------ Default
+ * PCx  - input with pull-up
+ */
+#define VAL_GPIO_LED_ODR            0xFFFFFFFF
+#define VAL_GPIO_LED_CRL            0x88888833      /*  PE7...PE0 */
+#define VAL_GPIO_LED_CRH            0x88888888      /* PE15...PE8 */
+
+#define GPIO_USB_BASE   GPIOD_BASE
+#define GPIO_LED_BASE   GPIOE_BASE
+
+#define RCC_ENR_IOP_EN \
+	(RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPDEN | RCC_APB2ENR_IOPEEN)
+#define RCC_RSTR_IOP_RST \
+	(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPDRST | RCC_APB2RSTR_IOPERST)
+
+/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1).  */
-- 
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