From a96f84ff74ed38de90c9133296dc4d49bdcf007d Mon Sep 17 00:00:00 2001
From: NIIBE Yutaka <gniibe@fsij.org>
Date: Wed, 1 Feb 2017 17:31:52 +0900
Subject: Add Blue Pill support.
---
AUTHORS | 4 ++++
ChangeLog | 4 ++++
board/board-blue-pill.h | 36 ++++++++++++++++++++++++++++++++++++
3 files changed, 44 insertions(+)
create mode 100644 board/board-blue-pill.h
diff --git a/AUTHORS b/AUTHORS
index e87564a..a2ef4d1 100644
--- a/AUTHORS
+++ b/AUTHORS
@@ -42,6 +42,10 @@ NIIBE Yutaka:
board-fs-bb48.h
+Paul Fertser:
+ Added Blue Pill support.
+ board/board-blue-pill.h
+
Szczepan Zalega:
Modified Nitrokey-Start support.
board/board-nitrokey-start.h
diff --git a/ChangeLog b/ChangeLog
index d6aeee2..01bfbdc 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2017-02-01 Paul Fertser <fercerpav@gmail.com>
+
+ * board/board-blue-pill.h: New.
+
2016-12-08 Szczepan Zalega <szczepan@nitrokey.com>
* board/board-nitrokey-start.h (VAL_GPIO_USB_ODR): Switch off red
diff --git a/board/board-blue-pill.h b/board/board-blue-pill.h
new file mode 100644
index 0000000..68843d7
--- /dev/null
+++ b/board/board-blue-pill.h
@@ -0,0 +1,36 @@
+#define BOARD_NAME "Blue Pill"
+/* http://wiki.stm32duino.com/index.php?title=Blue_Pill */
+/* echo -n "Blue Pill" | shasum -a 256 | sed -e 's/^.*\(........\) -$/\1/' */
+#define BOARD_ID 0xa1099d43
+
+#define STM32F10X_MD /* Medium-density device */
+
+#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE 9
+#define STM32_HSECLK 8000000
+
+#define GPIO_LED_BASE GPIOC_BASE
+#define GPIO_LED_CLEAR_TO_EMIT 13
+#define GPIO_USB_BASE GPIOA_BASE
+#define GPIO_USB_SET_TO_ENABLE 12
+#undef GPIO_OTHER_BASE
+
+/*
+ * Port A setup.
+ * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
+ * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
+ * PC13 - Push pull output 50MHz (LED 1:ON 0:OFF)
+ * ------------------------ Default
+ * PAx - input with pull-up
+ * PCx - input with pull-up
+ */
+#define VAL_GPIO_USB_ODR 0xFFFFE7FF
+#define VAL_GPIO_USB_CRL 0x88888888 /* PA7...PA0 */
+#define VAL_GPIO_USB_CRH 0x88811888 /* PA15...PA8 */
+
+#define VAL_GPIO_LED_ODR 0xFFFFFFFF
+#define VAL_GPIO_LED_CRL 0x88888888 /* PC7...PC0 */
+#define VAL_GPIO_LED_CRH 0x88388888 /* PC15...PC8 */
+
+#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPCEN)
+#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPCRST)
--
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