From 2c9e6b69d2232b18af028048bd5d3a1904927361 Mon Sep 17 00:00:00 2001
From: NIIBE Yutaka <gniibe@fsij.org>
Date: Fri, 31 Jul 2015 17:56:23 +0900
Subject: update example-fsm-55
---
AUTHORS | 4 +
ChangeLog | 9 +
clk_gpio_init.c | 2 +
entry.c | 8 +-
example-cdc/sys.h | 2 +
example-fsm-55/Makefile | 3 +-
example-fsm-55/README | 12 +
example-fsm-55/hacker-emblem.ld | 43 +---
example-fsm-55/stlink-v2.cfg | 11 +
example-fsm-55/sys.c | 489 ++++++----------------------------------
example-fsm-55/sys.h | 132 -----------
example-led/sys.c | 462 ++++++++++++++++++++++++++++++++++++-
example-led/sys.h | 135 ++++++++++-
13 files changed, 728 insertions(+), 584 deletions(-)
create mode 100644 example-fsm-55/README
create mode 100644 example-fsm-55/stlink-v2.cfg
delete mode 100644 example-fsm-55/sys.h
mode change 120000 => 100644 example-led/sys.c
mode change 120000 => 100644 example-led/sys.h
diff --git a/AUTHORS b/AUTHORS
index b833a29..1b8d405 100644
--- a/AUTHORS
+++ b/AUTHORS
@@ -12,6 +12,10 @@ Kenji Rikitake:
Added ST Nucleo F103 support.
board/board-st-nucleo-f103.h
+Kiwamu Okabe:
+ Wrote an OpenOCD scirpt:
+ example-fsm-55/stlink-v2.cfg
+
NIIBE Yutaka:
Write the library:
chopstx.c, eventflag.c, entry.c, clk_gpio_init.c
diff --git a/ChangeLog b/ChangeLog
index 7a58afe..3586795 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,12 @@
+2015-07-31 Niibe Yutaka <gniibe@fsij.org>
+
+ * example-fsm-55/Makefile (DEFS): Remove HAVE_SYS_H.
+ Add MAKE_ENTRY_PUBLIC.
+ * example-fsm-55/hacker-emblem.ld: Put vectors on ROM.
+ * example-fsm-55/sys.c: No system services.
+ * entry.c (entry): Can be public.
+ * clk_gpio_init.c [MCU_STM32F0] (clock_init): Don't change CFGR1.
+
2015-07-30 Niibe Yutaka <gniibe@fsij.org>
* board/board-st-nucleo-f103.h: New. Contributed by Kenji
diff --git a/clk_gpio_init.c b/clk_gpio_init.c
index cb036c5..4c1f2bd 100644
--- a/clk_gpio_init.c
+++ b/clk_gpio_init.c
@@ -231,8 +231,10 @@ clock_init (void)
RCC->APB2RSTR = RCC_APB2RSTR_SYSCFGRST;
RCC->APB2RSTR = 0;
+# if defined(HAVE_SYS_H)
/* Use vectors on RAM */
SYSCFG->CFGR1 = (SYSCFG->CFGR1 & ~SYSCFG_CFGR1_MEM_MODE) | 3;
+# endif
#endif
}
diff --git a/entry.c b/entry.c
index f79a207..be79af6 100644
--- a/entry.c
+++ b/entry.c
@@ -41,6 +41,12 @@
#endif
+#ifdef MAKE_ENTRY_PUBLIC
+#define STATIC_ENTRY
+#else
+#define STATIC_ENTRY static
+#endif
+
extern uint8_t __main_stack_end__;
extern void svc (void);
extern void preempt (void);
@@ -98,7 +104,7 @@ uint32_t vectors_in_ram[48];
/*
* This routine only changes PSP and not MSP.
*/
-static __attribute__ ((naked,section(".text.startup.0")))
+STATIC_ENTRY __attribute__ ((naked,section(".text.startup.0")))
void entry (void)
{
asm volatile ("bl clock_init\n\t"
diff --git a/example-cdc/sys.h b/example-cdc/sys.h
index 3127341..370aa1c 100644
--- a/example-cdc/sys.h
+++ b/example-cdc/sys.h
@@ -7,6 +7,8 @@
#define BOARD_ID_STBEE 0x945c37e8
#define BOARD_ID_STM32_PRIMER2 0x21e5798d
#define BOARD_ID_STM8S_DISCOVERY 0x2f0976bb
+#define BOARD_ID_ST_DONGLE 0x2cd4e471
+#define BOARD_ID_ST_NUCLEO_F103 0x9b87c16d
extern const uint8_t sys_version[8];
extern const uint32_t sys_board_id;
diff --git a/example-fsm-55/Makefile b/example-fsm-55/Makefile
index 755639c..a6642f3 100644
--- a/example-fsm-55/Makefile
+++ b/example-fsm-55/Makefile
@@ -14,7 +14,8 @@ OBJCOPY = $(CROSS)objcopy
MCU = cortex-m0 # -save-temps
CWARN = -Wall -Wextra -Wstrict-prototypes
-DEFS = -DHAVE_SYS_H -DFREE_STANDING -DMHZ=48 -DUSE_WFI_FOR_IDLE
+DEFS = -DMAKE_ENTRY_PUBLIC \
+ -DFREE_STANDING -DMHZ=48 -DUSE_WFI_FOR_IDLE
OPT = -O3 -Os -g
LIBS =
diff --git a/example-fsm-55/README b/example-fsm-55/README
new file mode 100644
index 0000000..351e6cd
--- /dev/null
+++ b/example-fsm-55/README
@@ -0,0 +1,12 @@
+FSM-55 LED Matrix Display Board is a simple board to play 5x5 LED
+Display. Please see the product page:
+
+ http://www.seeedstudio.com/depot/FSM55-LED-Matrix-Display-p-2121.html
+
+The file stlink-v2.cfg can be used for ST-Link/V2 with OpenOCD. You
+can flash by typing:
+
+ $ openocd -f ./stlink-v2.cfg -c "program build/hacker-emblem.elf"
+
+Thanks to Kiwamu Okabe who kindly tested OpenOCD and wrote the
+configuration.
diff --git a/example-fsm-55/hacker-emblem.ld b/example-fsm-55/hacker-emblem.ld
index 40bf480..407a981 100644
--- a/example-fsm-55/hacker-emblem.ld
+++ b/example-fsm-55/hacker-emblem.ld
@@ -9,44 +9,24 @@ __process3_stack_size__ = 0x0100; /* third thread program */
MEMORY
{
- flash0 : org = 0x08000000, len = 4k
- flash : org = 0x08000000+0x1000, len = 60k
- ram : org = 0x20000000, len = 20k
+ flash : org = 0x08000000, len = 16k
+ ram : org = 0x20000000, len = 4k
}
__ram_start__ = ORIGIN(ram);
-__ram_size__ = 20k;
+__ram_size__ = 4k;
__ram_end__ = __ram_start__ + __ram_size__;
SECTIONS
{
. = 0;
- .sys : ALIGN(4) SUBALIGN(4)
- {
- _sys = .;
- KEEP(*(.vectors))
- . = ALIGN(16);
- KEEP(*(.sys.version))
- KEEP(*(.sys.board_id))
- KEEP(*(.sys.board_name))
- build/sys.o(.text)
- build/sys.o(.text.*)
- build/sys.o(.rodata)
- build/sys.o(.rodata.*)
- . = ALIGN(1024);
- } > flash0 =0xffffffff
-
_text = .;
- .startup : ALIGN(128) SUBALIGN(128)
- {
- KEEP(*(.startup.vectors))
- . = ALIGN (16);
- } > flash =0xffffffff
-
.text : ALIGN(16) SUBALIGN(16)
{
+ KEEP(*(.vectors))
+ . = ALIGN(16);
*(.text.startup.*)
*(.text)
*(.text.*)
@@ -58,6 +38,12 @@ SECTIONS
. = ALIGN(8);
} > flash
+ /DISCARD/ :
+ {
+ *(.startup.vectors)
+ *(.bss.startup.0)
+ }
+
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} > flash
.ARM.exidx : {
@@ -75,13 +61,6 @@ SECTIONS
_etext = .;
_textdata = _etext;
- .vectors_in_ram :
- {
- . = ALIGN(8);
- __vector_ram_addr__ = .;
- KEEP(*(.bss.startup.*))
- } > ram
-
.process_stack :
{
. = ALIGN(8);
diff --git a/example-fsm-55/stlink-v2.cfg b/example-fsm-55/stlink-v2.cfg
new file mode 100644
index 0000000..278918e
--- /dev/null
+++ b/example-fsm-55/stlink-v2.cfg
@@ -0,0 +1,11 @@
+# Contributed by Kiwamu Okabe
+
+source [find interface/stlink-v2.cfg]
+transport select hla_swd
+
+# The STM32F030F4P6 is a *tightly* constrained chip; the work area size must be
+# similarly constrained.
+set WORKAREASIZE 0x1000
+source [find target/stm32f0x.cfg]
+
+# use hardware reset, connect under reset
diff --git a/example-fsm-55/sys.c b/example-fsm-55/sys.c
index a37c393..6f3813d 100644
--- a/example-fsm-55/sys.c
+++ b/example-fsm-55/sys.c
@@ -1,7 +1,7 @@
/*
- * sys.c - system routines for the initial page for STM32F030 / STM32F103.
+ * sys.c - No system routines, but only RESET handler for STM32F030.
*
- * Copyright (C) 2013, 2014, 2015 Flying Stone Technology
+ * Copyright (C) 2015 Flying Stone Technology
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* Copying and distribution of this file, with or without modification,
@@ -9,453 +9,110 @@
* notice and this notice are preserved. This file is offered as-is,
* without any warranty.
*
- * When the flash ROM is protected, we cannot modify the initial page.
- * We put some system routines (which is useful for any program) here.
*/
#include <stdint.h>
#include <stdlib.h>
-#include "board.h"
-#include "clk_gpio_init.c"
-
-#define CORTEX_PRIORITY_BITS 4
-#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
-#define USB_LP_CAN1_RX0_IRQn 20
-#define STM32_USB_IRQ_PRIORITY 11
-
-struct NVIC {
- uint32_t ISER[8];
- uint32_t unused1[24];
- uint32_t ICER[8];
- uint32_t unused2[24];
- uint32_t ISPR[8];
- uint32_t unused3[24];
- uint32_t ICPR[8];
- uint32_t unused4[24];
- uint32_t IABR[8];
- uint32_t unused5[56];
- uint32_t IPR[60];
-};
-
-static struct NVIC *const NVICBase = ((struct NVIC *const)0xE000E100);
-#define NVIC_ISER(n) (NVICBase->ISER[n >> 5])
-#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5])
-#define NVIC_IPR(n) (NVICBase->IPR[n >> 2])
-
-static void
-nvic_enable_vector (uint32_t n, uint32_t prio)
-{
- unsigned int sh = (n & 3) << 3;
-
- NVIC_IPR (n) = (NVIC_IPR(n) & ~(0xFF << sh)) | (prio << sh);
- NVIC_ICPR (n) = 1 << (n & 0x1F);
- NVIC_ISER (n) = 1 << (n & 0x1F);
-}
-
-static void
-usb_cable_config (int enable)
-{
-#if defined(GPIO_USB_SET_TO_ENABLE)
- if (enable)
- GPIO_USB->BSRR = (1 << GPIO_USB_SET_TO_ENABLE);
- else
- GPIO_USB->BRR = (1 << GPIO_USB_SET_TO_ENABLE);
-#elif defined(GPIO_USB_CLEAR_TO_ENABLE)
- if (enable)
- GPIO_USB->BRR = (1 << GPIO_USB_CLEAR_TO_ENABLE);
- else
- GPIO_USB->BSRR = (1 << GPIO_USB_CLEAR_TO_ENABLE);
-#else
- (void)enable;
-#endif
-}
-
-void
-set_led (int on)
-{
-#if defined(GPIO_LED_CLEAR_TO_EMIT)
- if (on)
- GPIO_LED->BRR = (1 << GPIO_LED_CLEAR_TO_EMIT);
- else
- GPIO_LED->BSRR = (1 << GPIO_LED_CLEAR_TO_EMIT);
-#else
- if (on)
- GPIO_LED->BSRR = (1 << GPIO_LED_SET_TO_EMIT);
- else
- GPIO_LED->BRR = (1 << GPIO_LED_SET_TO_EMIT);
-#endif
-}
-
-static void wait (int count)
-{
- int i;
-
- for (i = 0; i < count; i++)
- asm volatile ("" : : "r" (i) : "memory");
-}
-
-
-static void
-usb_lld_sys_shutdown (void)
-{
- RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
- RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
- usb_cable_config (0);
-}
-
-static void
-usb_lld_sys_init (void)
-{
- if ((RCC->APB1ENR & RCC_APB1ENR_USBEN)
- && (RCC->APB1RSTR & RCC_APB1RSTR_USBRST) == 0)
- /* Make sure the device is disconnected, even after core reset. */
- {
- usb_lld_sys_shutdown ();
- /* Disconnect requires SE0 (>= 2.5uS). */
- wait (300);
- }
-
- usb_cable_config (1);
- RCC->APB1ENR |= RCC_APB1ENR_USBEN;
- nvic_enable_vector (USB_LP_CAN1_RX0_IRQn,
- CORTEX_PRIORITY_MASK (STM32_USB_IRQ_PRIORITY));
- /*
- * Note that we also have other IRQ(s):
- * USB_HP_CAN1_TX_IRQn (for double-buffered or isochronous)
- * USBWakeUp_IRQn (suspend/resume)
- */
- RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
- RCC->APB1RSTR = 0;
-}
-
-#define FLASH_KEY1 0x45670123UL
-#define FLASH_KEY2 0xCDEF89ABUL
-
-enum flash_status
-{
- FLASH_BUSY = 1,
- FLASH_ERROR_PG,
- FLASH_ERROR_WRP,
- FLASH_COMPLETE,
- FLASH_TIMEOUT
-};
-
-static void __attribute__ ((used))
-flash_unlock (void)
-{
- FLASH->KEYR = FLASH_KEY1;
- FLASH->KEYR = FLASH_KEY2;
-}
-
-
-#define intr_disable() asm volatile ("cpsid i" : : : "memory")
-#define intr_enable() asm volatile ("cpsie i" : : : "memory")
-
-#define FLASH_SR_BSY 0x01
-#define FLASH_SR_PGERR 0x04
-#define FLASH_SR_WRPRTERR 0x10
-#define FLASH_SR_EOP 0x20
-
-#define FLASH_CR_PG 0x0001
-#define FLASH_CR_PER 0x0002
-#define FLASH_CR_MER 0x0004
-#define FLASH_CR_OPTPG 0x0010
-#define FLASH_CR_OPTER 0x0020
-#define FLASH_CR_STRT 0x0040
-#define FLASH_CR_LOCK 0x0080
-#define FLASH_CR_OPTWRE 0x0200
-#define FLASH_CR_ERRIE 0x0400
-#define FLASH_CR_EOPIE 0x1000
-
-static int
-flash_wait_for_last_operation (uint32_t timeout)
-{
- int status;
-
- do
- {
- status = FLASH->SR;
- if (--timeout == 0)
- break;
- }
- while ((status & FLASH_SR_BSY) != 0);
-
- return status & (FLASH_SR_BSY|FLASH_SR_PGERR|FLASH_SR_WRPRTERR);
-}
-
-#define FLASH_PROGRAM_TIMEOUT 0x00010000
-#define FLASH_ERASE_TIMEOUT 0x01000000
-
-static int
-flash_program_halfword (uint32_t addr, uint16_t data)
+static void __attribute__ ((naked))
+reset (void)
{
- int status;
-
- status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
-
- intr_disable ();
- if (status == 0)
- {
- FLASH->CR |= FLASH_CR_PG;
-
- *(volatile uint16_t *)addr = data;
-
- status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
- FLASH->CR &= ~FLASH_CR_PG;
- }
- intr_enable ();
-
- return status;
+ asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
+ "mov r0, pc\n\t" /* r0 = PC & ~0x0fff */
+ "mov r1, #0x10\n\t"
+ "lsl r1, #8\n\t"
+ "sub r1, r1, #1\n\t"
+ "bic r0, r0, r1\n\t"
+ "ldr r2, [r0]\n\t"
+ "msr MSP, r2\n\t" /* Main (exception handler) stack. */
+ "b entry\n\t"
+ : /* no output */ : /* no input */ : "memory");
+ /* Never reach here. */
}
-static int
-flash_erase_page (uint32_t addr)
-{
- int status;
-
- status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
-
- intr_disable ();
- if (status == 0)
- {
- FLASH->CR |= FLASH_CR_PER;
- FLASH->AR = addr;
- FLASH->CR |= FLASH_CR_STRT;
-
- status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
- FLASH->CR &= ~FLASH_CR_PER;
- }
- intr_enable ();
-
- return status;
-}
+extern uint8_t __main_stack_end__;
+extern void svc (void);
+extern void preempt (void);
+extern void chx_timer_expired (void);
+extern void chx_handle_intr (void);
-static int
-flash_check_blank (const uint8_t *p_start, size_t size)
+static void nmi (void)
{
- const uint8_t *p;
-
- for (p = p_start; p < p_start + size; p++)
- if (*p != 0xff)
- return 0;
-
- return 1;
+ for (;;);
}
-#define FLASH_START_ADDR 0x08000000 /* Fixed for all STM32F0/F1. */
-#define FLASH_OFFSET 0x1000 /* First pages are not-writable
- when protected. */
-#if defined(__ARM_ARCH_6M__)
-#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7cc)
-#define CHIP_ID_REG ((uint32_t *)0x40015800)
-#else
-#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7e0)
-#define CHIP_ID_REG ((uint32_t *)0xe0042000)
-#endif
-#define FLASH_START (FLASH_START_ADDR+FLASH_OFFSET)
-
-static int
-flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
+static void __attribute__ ((naked))
+hard_fault (void)
{
- int status;
- uint32_t flash_end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
-
- if (dst_addr < FLASH_START || dst_addr + len > flash_end)
- return 0;
-
- while (len)
- {
- uint16_t hw = *src++;
+ register uint32_t primask;
- hw |= (*src++ << 8);
- status = flash_program_halfword (dst_addr, hw);
- if (status != 0)
- return 0; /* error return */
+ asm ("mrs %0, PRIMASK" : "=r" (primask));
- dst_addr += 2;
- len -= 2;
- }
-
- return 1;
+ if (primask)
+ asm volatile ("b svc");
+ else
+ for (;;);
}
-#define OPTION_BYTES_ADDR 0x1ffff800
-
-static int
-flash_protect (void)
+static void mem_manage (void)
{
- int status;
- uint32_t option_bytes_value;
-
- status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
-
- intr_disable ();
- if (status == 0)
- {
- FLASH->OPTKEYR = FLASH_KEY1;
- FLASH->OPTKEYR = FLASH_KEY2;
-
- FLASH->CR |= FLASH_CR_OPTER;
- FLASH->CR |= FLASH_CR_STRT;
-
- status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
- FLASH->CR &= ~FLASH_CR_OPTER;
- }
- intr_enable ();
-
- if (status != 0)
- return 0;
-
- option_bytes_value = *(uint32_t *)OPTION_BYTES_ADDR;
- return (option_bytes_value & 0xff) == 0xff ? 1 : 0;
+ for (;;);
}
-static void __attribute__((naked))
-flash_erase_all_and_exec (void (*entry)(void))
+static void bus_fault (void)
{
- uint32_t addr = FLASH_START;
- uint32_t end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
- uint32_t page_size = 1024;
- int r;
-
- if (((*CHIP_ID_REG) & 0xfff) == 0x0414)
- page_size = 2048;
-
- while (addr < end)
- {
- r = flash_erase_page (addr);
- if (r != 0)
- break;
-
- addr += page_size;
- }
-
- if (addr >= end)
- (*entry) ();
-
for (;;);
}
-struct SCB
-{
- volatile uint32_t CPUID;
- volatile uint32_t ICSR;
- volatile uint32_t VTOR;
- volatile uint32_t AIRCR;
- volatile uint32_t SCR;
- volatile uint32_t CCR;
- volatile uint8_t SHP[12];
- volatile uint32_t SHCSR;
- volatile uint32_t CFSR;
- volatile uint32_t HFSR;
- volatile uint32_t DFSR;
- volatile uint32_t MMFAR;
- volatile uint32_t BFAR;
- volatile uint32_t AFSR;
- volatile uint32_t PFR[2];
- volatile uint32_t DFR;
- volatile uint32_t ADR;
- volatile uint32_t MMFR[4];
- volatile uint32_t ISAR[5];
-};
-
-#define SCS_BASE (0xE000E000)
-#define SCB_BASE (SCS_BASE + 0x0D00)
-static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
-
-#define SYSRESETREQ 0x04
-static void
-nvic_system_reset (void)
+static void usage_fault (void)
{
- SCB->AIRCR = (0x05FA0000 | (SCB->AIRCR & 0x70) | SYSRESETREQ);
- asm volatile ("dsb");
for (;;);
}
-static void __attribute__ ((naked))
-reset (void)
+static void none (void)
{
- /*
- * This code may not be at the start of flash ROM, because of DFU.
- * So, we take the address from PC.
- */
-#if defined(__ARM_ARCH_6M__)
- asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
- "ldr r0, 1f\n\t" /* r0 = RAM start */
- "mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
- "mov r2, #0x10\n\t"
- "lsl r2, #8\n\t"
- "add r1, r1, r2\n\t"
- "sub r2, r2, #1\n\t"
- "bic r1, r1, r2\n\t"
- "mov r2, #188\n"
- "2:\n\t" /* Copy vectors. It will be enabled later by clock_init. */
- "ldr r3, [r1, r2]\n\t"
- "str r3, [r0, r2]\n\t"
- "sub r2, #4\n\t"
- "bcs 2b\n\t"
- "msr MSP, r3\n\t" /* Main (exception handler) stack. */
- "ldr r0, [r1, #4]\n\t" /* Reset handler. */
- "bx r0\n\t"
- ".align 2\n"
- "1: .word 0x20000000"
- : /* no output */ : /* no input */ : "memory");
-#else
- extern const unsigned long *FT0, *FT1, *FT2;
- asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
- "ldr r0, 1f\n\t" /* r0 = SCR */
- "mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
- "mov r2, #0x1000\n\t"
- "add r1, r1, r2\n\t"
- "sub r2, r2, #1\n\t"
- "bic r1, r1, r2\n\t"
- "str r1, [r0, #8]\n\t" /* Set SCR->VCR */
- "ldr r0, [r1], #4\n\t"
- "msr MSP, r0\n\t" /* Main (exception handler) stack. */
- "ldr r0, [r1]\n\t" /* Reset handler. */
- "bx r0\n\t"
- ".align 2\n"
- "1: .word 0xe000ed00"
- : /* no output */ : /* no input */ : "memory");
- /* Artificial entry to refer FT0, FT1, and FT2. */
- asm volatile (""
- : : "r" (FT0), "r" (FT1), "r" (FT2));
-#endif
- /* Never reach here. */
}
+
typedef void (*handler)(void);
-extern uint8_t __ram_end__;
+extern uint8_t __main_stack_end__;
handler vector[] __attribute__ ((section(".vectors"))) = {
- (handler)&__ram_end__,
+ (handler)&__main_stack_end__,
reset,
- (handler)set_led,
- flash_unlock,
- (handler)flash_program_halfword,
- (handler)flash_erase_page,
- (handler)flash_check_blank,
- (handler)flash_write,
- (handler)flash_protect,
- (handler)flash_erase_all_and_exec,
- usb_lld_sys_init,
- usb_lld_sys_shutdown,
- nvic_system_reset,
- clock_init,
- gpio_init,
- NULL,
-};
-
-const uint8_t sys_version[8] __attribute__((section(".sys.version"))) = {
- 3*2+2, /* bLength */
- 0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE */
- /* sys version: "2.1" */
- '2', 0, '.', 0, '1', 0,
+ nmi, /* nmi */
+ hard_fault, /* hard fault */
+ /* 0x10 */
+ mem_manage, /* mem manage */
+ bus_fault, /* bus fault */
+ usage_fault, /* usage fault */
+ none,
+ /* 0x20 */
+ none, none, none, /* reserved */
+ svc, /* SVCall */
+ none, /* Debug */
+ none, /* reserved */
+ preempt, /* PendSV */
+ chx_timer_expired, /* SysTick */
+ /* 0x40 */
+ chx_handle_intr /* WWDG */, chx_handle_intr /* PVD */,
+ chx_handle_intr /* TAMPER */, chx_handle_intr /* RTC */,
+ chx_handle_intr /* FLASH */, chx_handle_intr /* RCC */,
+ chx_handle_intr /* EXTI0 */, chx_handle_intr /* EXTI1 */,
+ /* 0x60 */
+ chx_handle_intr /* EXTI2 */, chx_handle_intr /* EXTI3 */,
+ chx_handle_intr /* EXTI4 */, chx_handle_intr /* DMA1 CH1 */,
+ chx_handle_intr /* DMA1 CH2 */, chx_handle_intr /* DMA1 CH3 */,
+ chx_handle_intr /* DMA1 CH4 */, chx_handle_intr /* DMA1 CH5 */,
+ /* 0x80 */
+ chx_handle_intr /* DMA1 CH6 */, chx_handle_intr /* DMA1 CH7 */,
+ chx_handle_intr /* ADC1_2 */, chx_handle_intr /* USB HP */,
+ /* 0x90 */
+ chx_handle_intr /* USB LP */, chx_handle_intr /* CAN */,
+ /* ... and more. EXT9_5, TIMx, I2C, SPI, USART, EXT15_10 */
+ chx_handle_intr, chx_handle_intr,
+ /* 0xA0 */
+ chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
+ chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
+ /* 0xc0 */
};
-
-const uint32_t __attribute__((section(".sys.board_id")))
-sys_board_id = BOARD_ID;
-
-const uint8_t __attribute__((section(".sys.board_name")))
-sys_board_name[] = BOARD_NAME;
diff --git a/example-fsm-55/sys.h b/example-fsm-55/sys.h
deleted file mode 100644
index 9bc5f08..0000000
--- a/example-fsm-55/sys.h
+++ /dev/null
@@ -1,132 +0,0 @@
-#if defined(__ARM_ARCH_6M__)
-#define BOARD_ID_STM32F0_DISCOVERY 0xde4b4bc1
-#define BOARD_ID_FSM_55 0x83433c76
-#else
-#define BOARD_ID_CQ_STARM 0xc5480875
-#define BOARD_ID_FST_01_00 0x613870a9
-#define BOARD_ID_FST_01 0x696886af
-#define BOARD_ID_MAPLE_MINI 0x7a445272
-#define BOARD_ID_OLIMEX_STM32_H103 0xf92bb594
-#define BOARD_ID_STBEE_MINI 0x1f341961
-#define BOARD_ID_STBEE 0x945c37e8
-#define BOARD_ID_STM32_PRIMER2 0x21e5798d
-#define BOARD_ID_STM8S_DISCOVERY 0x2f0976bb
-#endif
-
-extern const uint8_t sys_version[8];
-extern const uint32_t sys_board_id;
-extern const uint8_t sys_board_name[];
-
-typedef void (*handler)(void);
-extern handler vector[16];
-
-static inline const uint8_t *
-unique_device_id (void)
-{
- /* STM32F103 has 96-bit unique device identifier */
- const uint8_t *addr = (const uint8_t *)0x1ffff7e8;
-
- return addr;
-}
-
-static inline void
-set_led (int on)
-{
- void (*func) (int) = (void (*)(int))vector[2];
-
- return (*func) (on);
-}
-
-static inline void
-flash_unlock (void)
-{
- (*vector[3]) ();
-}
-
-static inline int
-flash_program_halfword (uint32_t addr, uint16_t data)
-{
- int (*func) (uint32_t, uint16_t) = (int (*)(uint32_t, uint16_t))vector[4];
-
- return (*func) (addr, data);
-}
-
-static inline int
-flash_erase_page (uint32_t addr)
-{
- int (*func) (uint32_t) = (int (*)(uint32_t))vector[5];
-
- return (*func) (addr);
-}
-
-static inline int
-flash_check_blank (const uint8_t *p_start, size_t size)
-{
- int (*func) (const uint8_t *, int) = (int (*)(const uint8_t *, int))vector[6];
-
- return (*func) (p_start, size);
-}
-
-static inline int
-flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
-{
- int (*func) (uint32_t, const uint8_t *, size_t)
- = (int (*)(uint32_t, const uint8_t *, size_t))vector[7];
-
- return (*func) (dst_addr, src, len);
-}
-
-static inline int
-flash_protect (void)
-{
- int (*func) (void) = (int (*)(void))vector[8];
-
- return (*func) ();
-}
-
-static inline void __attribute__((noreturn))
-flash_erase_all_and_exec (void (*entry)(void))
-{
- void (*func) (void (*)(void)) = (void (*)(void (*)(void)))vector[9];
-
- (*func) (entry);
- for (;;);
-}
-
-static inline void
-usb_lld_sys_init (void)
-{
- (*vector[10]) ();
-}
-
-static inline void
-usb_lld_sys_shutdown (void)
-{
- (*vector[11]) ();
-}
-
-static inline void
-nvic_system_reset (void)
-{
- (*vector[12]) ();
-}
-
-/*
- * Users can override INLINE by 'attribute((used))' to have an
- * implementation defined.
- */
-#if !defined(INLINE)
-#define INLINE __inline__
-#endif
-
-static INLINE void
-clock_init (void)
-{
- (*vector[13]) ();
-}
-
-static INLINE void
-gpio_init (void)
-{
- (*vector[14]) ();
-}
diff --git a/example-led/sys.c b/example-led/sys.c
deleted file mode 120000
index e2c4499..0000000
--- a/example-led/sys.c
+++ /dev/null
@@ -1 +0,0 @@
-../example-fsm-55/sys.c
\ No newline at end of file
diff --git a/example-led/sys.c b/example-led/sys.c
new file mode 100644
index 0000000..a37c393
--- /dev/null
+++ b/example-led/sys.c
@@ -0,0 +1,461 @@
+/*
+ * sys.c - system routines for the initial page for STM32F030 / STM32F103.
+ *
+ * Copyright (C) 2013, 2014, 2015 Flying Stone Technology
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * Copying and distribution of this file, with or without modification,
+ * are permitted in any medium without royalty provided the copyright
+ * notice and this notice are preserved. This file is offered as-is,
+ * without any warranty.
+ *
+ * When the flash ROM is protected, we cannot modify the initial page.
+ * We put some system routines (which is useful for any program) here.
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include "board.h"
+
+#include "clk_gpio_init.c"
+
+#define CORTEX_PRIORITY_BITS 4
+#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
+#define USB_LP_CAN1_RX0_IRQn 20
+#define STM32_USB_IRQ_PRIORITY 11
+
+struct NVIC {
+ uint32_t ISER[8];
+ uint32_t unused1[24];
+ uint32_t ICER[8];
+ uint32_t unused2[24];
+ uint32_t ISPR[8];
+ uint32_t unused3[24];
+ uint32_t ICPR[8];
+ uint32_t unused4[24];
+ uint32_t IABR[8];
+ uint32_t unused5[56];
+ uint32_t IPR[60];
+};
+
+static struct NVIC *const NVICBase = ((struct NVIC *const)0xE000E100);
+#define NVIC_ISER(n) (NVICBase->ISER[n >> 5])
+#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5])
+#define NVIC_IPR(n) (NVICBase->IPR[n >> 2])
+
+static void
+nvic_enable_vector (uint32_t n, uint32_t prio)
+{
+ unsigned int sh = (n & 3) << 3;
+
+ NVIC_IPR (n) = (NVIC_IPR(n) & ~(0xFF << sh)) | (prio << sh);
+ NVIC_ICPR (n) = 1 << (n & 0x1F);
+ NVIC_ISER (n) = 1 << (n & 0x1F);
+}
+
+static void
+usb_cable_config (int enable)
+{
+#if defined(GPIO_USB_SET_TO_ENABLE)
+ if (enable)
+ GPIO_USB->BSRR = (1 << GPIO_USB_SET_TO_ENABLE);
+ else
+ GPIO_USB->BRR = (1 << GPIO_USB_SET_TO_ENABLE);
+#elif defined(GPIO_USB_CLEAR_TO_ENABLE)
+ if (enable)
+ GPIO_USB->BRR = (1 << GPIO_USB_CLEAR_TO_ENABLE);
+ else
+ GPIO_USB->BSRR = (1 << GPIO_USB_CLEAR_TO_ENABLE);
+#else
+ (void)enable;
+#endif
+}
+
+void
+set_led (int on)
+{
+#if defined(GPIO_LED_CLEAR_TO_EMIT)
+ if (on)
+ GPIO_LED->BRR = (1 << GPIO_LED_CLEAR_TO_EMIT);
+ else
+ GPIO_LED->BSRR = (1 << GPIO_LED_CLEAR_TO_EMIT);
+#else
+ if (on)
+ GPIO_LED->BSRR = (1 << GPIO_LED_SET_TO_EMIT);
+ else
+ GPIO_LED->BRR = (1 << GPIO_LED_SET_TO_EMIT);
+#endif
+}
+
+static void wait (int count)
+{
+ int i;
+
+ for (i = 0; i < count; i++)
+ asm volatile ("" : : "r" (i) : "memory");
+}
+
+
+static void
+usb_lld_sys_shutdown (void)
+{
+ RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
+ RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
+ usb_cable_config (0);
+}
+
+static void
+usb_lld_sys_init (void)
+{
+ if ((RCC->APB1ENR & RCC_APB1ENR_USBEN)
+ && (RCC->APB1RSTR & RCC_APB1RSTR_USBRST) == 0)
+ /* Make sure the device is disconnected, even after core reset. */
+ {
+ usb_lld_sys_shutdown ();
+ /* Disconnect requires SE0 (>= 2.5uS). */
+ wait (300);
+ }
+
+ usb_cable_config (1);
+ RCC->APB1ENR |= RCC_APB1ENR_USBEN;
+ nvic_enable_vector (USB_LP_CAN1_RX0_IRQn,
+ CORTEX_PRIORITY_MASK (STM32_USB_IRQ_PRIORITY));
+ /*
+ * Note that we also have other IRQ(s):
+ * USB_HP_CAN1_TX_IRQn (for double-buffered or isochronous)
+ * USBWakeUp_IRQn (suspend/resume)
+ */
+ RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
+ RCC->APB1RSTR = 0;
+}
+
+#define FLASH_KEY1 0x45670123UL
+#define FLASH_KEY2 0xCDEF89ABUL
+
+enum flash_status
+{
+ FLASH_BUSY = 1,
+ FLASH_ERROR_PG,
+ FLASH_ERROR_WRP,
+ FLASH_COMPLETE,
+ FLASH_TIMEOUT
+};
+
+static void __attribute__ ((used))
+flash_unlock (void)
+{
+ FLASH->KEYR = FLASH_KEY1;
+ FLASH->KEYR = FLASH_KEY2;
+}
+
+
+#define intr_disable() asm volatile ("cpsid i" : : : "memory")
+#define intr_enable() asm volatile ("cpsie i" : : : "memory")
+
+#define FLASH_SR_BSY 0x01
+#define FLASH_SR_PGERR 0x04
+#define FLASH_SR_WRPRTERR 0x10
+#define FLASH_SR_EOP 0x20
+
+#define FLASH_CR_PG 0x0001
+#define FLASH_CR_PER 0x0002
+#define FLASH_CR_MER 0x0004
+#define FLASH_CR_OPTPG 0x0010
+#define FLASH_CR_OPTER 0x0020
+#define FLASH_CR_STRT 0x0040
+#define FLASH_CR_LOCK 0x0080
+#define FLASH_CR_OPTWRE 0x0200
+#define FLASH_CR_ERRIE 0x0400
+#define FLASH_CR_EOPIE 0x1000
+
+static int
+flash_wait_for_last_operation (uint32_t timeout)
+{
+ int status;
+
+ do
+ {
+ status = FLASH->SR;
+ if (--timeout == 0)
+ break;
+ }
+ while ((status & FLASH_SR_BSY) != 0);
+
+ return status & (FLASH_SR_BSY|FLASH_SR_PGERR|FLASH_SR_WRPRTERR);
+}
+
+#define FLASH_PROGRAM_TIMEOUT 0x00010000
+#define FLASH_ERASE_TIMEOUT 0x01000000
+
+static int
+flash_program_halfword (uint32_t addr, uint16_t data)
+{
+ int status;
+
+ status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
+
+ intr_disable ();
+ if (status == 0)
+ {
+ FLASH->CR |= FLASH_CR_PG;
+
+ *(volatile uint16_t *)addr = data;
+
+ status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
+ FLASH->CR &= ~FLASH_CR_PG;
+ }
+ intr_enable ();
+
+ return status;
+}
+
+static int
+flash_erase_page (uint32_t addr)
+{
+ int status;
+
+ status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
+
+ intr_disable ();
+ if (status == 0)
+ {
+ FLASH->CR |= FLASH_CR_PER;
+ FLASH->AR = addr;
+ FLASH->CR |= FLASH_CR_STRT;
+
+ status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
+ FLASH->CR &= ~FLASH_CR_PER;
+ }
+ intr_enable ();
+
+ return status;
+}
+
+static int
+flash_check_blank (const uint8_t *p_start, size_t size)
+{
+ const uint8_t *p;
+
+ for (p = p_start; p < p_start + size; p++)
+ if (*p != 0xff)
+ return 0;
+
+ return 1;
+}
+
+#define FLASH_START_ADDR 0x08000000 /* Fixed for all STM32F0/F1. */
+#define FLASH_OFFSET 0x1000 /* First pages are not-writable
+ when protected. */
+#if defined(__ARM_ARCH_6M__)
+#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7cc)
+#define CHIP_ID_REG ((uint32_t *)0x40015800)
+#else
+#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7e0)
+#define CHIP_ID_REG ((uint32_t *)0xe0042000)
+#endif
+#define FLASH_START (FLASH_START_ADDR+FLASH_OFFSET)
+
+static int
+flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
+{
+ int status;
+ uint32_t flash_end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
+
+ if (dst_addr < FLASH_START || dst_addr + len > flash_end)
+ return 0;
+
+ while (len)
+ {
+ uint16_t hw = *src++;
+
+ hw |= (*src++ << 8);
+ status = flash_program_halfword (dst_addr, hw);
+ if (status != 0)
+ return 0; /* error return */
+
+ dst_addr += 2;
+ len -= 2;
+ }
+
+ return 1;
+}
+
+#define OPTION_BYTES_ADDR 0x1ffff800
+
+static int
+flash_protect (void)
+{
+ int status;
+ uint32_t option_bytes_value;
+
+ status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
+
+ intr_disable ();
+ if (status == 0)
+ {
+ FLASH->OPTKEYR = FLASH_KEY1;
+ FLASH->OPTKEYR = FLASH_KEY2;
+
+ FLASH->CR |= FLASH_CR_OPTER;
+ FLASH->CR |= FLASH_CR_STRT;
+
+ status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
+ FLASH->CR &= ~FLASH_CR_OPTER;
+ }
+ intr_enable ();
+
+ if (status != 0)
+ return 0;
+
+ option_bytes_value = *(uint32_t *)OPTION_BYTES_ADDR;
+ return (option_bytes_value & 0xff) == 0xff ? 1 : 0;
+}
+
+static void __attribute__((naked))
+flash_erase_all_and_exec (void (*entry)(void))
+{
+ uint32_t addr = FLASH_START;
+ uint32_t end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
+ uint32_t page_size = 1024;
+ int r;
+
+ if (((*CHIP_ID_REG) & 0xfff) == 0x0414)
+ page_size = 2048;
+
+ while (addr < end)
+ {
+ r = flash_erase_page (addr);
+ if (r != 0)
+ break;
+
+ addr += page_size;
+ }
+
+ if (addr >= end)
+ (*entry) ();
+
+ for (;;);
+}
+
+struct SCB
+{
+ volatile uint32_t CPUID;
+ volatile uint32_t ICSR;
+ volatile uint32_t VTOR;
+ volatile uint32_t AIRCR;
+ volatile uint32_t SCR;
+ volatile uint32_t CCR;
+ volatile uint8_t SHP[12];
+ volatile uint32_t SHCSR;
+ volatile uint32_t CFSR;
+ volatile uint32_t HFSR;
+ volatile uint32_t DFSR;
+ volatile uint32_t MMFAR;
+ volatile uint32_t BFAR;
+ volatile uint32_t AFSR;
+ volatile uint32_t PFR[2];
+ volatile uint32_t DFR;
+ volatile uint32_t ADR;
+ volatile uint32_t MMFR[4];
+ volatile uint32_t ISAR[5];
+};
+
+#define SCS_BASE (0xE000E000)
+#define SCB_BASE (SCS_BASE + 0x0D00)
+static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
+
+#define SYSRESETREQ 0x04
+static void
+nvic_system_reset (void)
+{
+ SCB->AIRCR = (0x05FA0000 | (SCB->AIRCR & 0x70) | SYSRESETREQ);
+ asm volatile ("dsb");
+ for (;;);
+}
+
+static void __attribute__ ((naked))
+reset (void)
+{
+ /*
+ * This code may not be at the start of flash ROM, because of DFU.
+ * So, we take the address from PC.
+ */
+#if defined(__ARM_ARCH_6M__)
+ asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
+ "ldr r0, 1f\n\t" /* r0 = RAM start */
+ "mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
+ "mov r2, #0x10\n\t"
+ "lsl r2, #8\n\t"
+ "add r1, r1, r2\n\t"
+ "sub r2, r2, #1\n\t"
+ "bic r1, r1, r2\n\t"
+ "mov r2, #188\n"
+ "2:\n\t" /* Copy vectors. It will be enabled later by clock_init. */
+ "ldr r3, [r1, r2]\n\t"
+ "str r3, [r0, r2]\n\t"
+ "sub r2, #4\n\t"
+ "bcs 2b\n\t"
+ "msr MSP, r3\n\t" /* Main (exception handler) stack. */
+ "ldr r0, [r1, #4]\n\t" /* Reset handler. */
+ "bx r0\n\t"
+ ".align 2\n"
+ "1: .word 0x20000000"
+ : /* no output */ : /* no input */ : "memory");
+#else
+ extern const unsigned long *FT0, *FT1, *FT2;
+ asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
+ "ldr r0, 1f\n\t" /* r0 = SCR */
+ "mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
+ "mov r2, #0x1000\n\t"
+ "add r1, r1, r2\n\t"
+ "sub r2, r2, #1\n\t"
+ "bic r1, r1, r2\n\t"
+ "str r1, [r0, #8]\n\t" /* Set SCR->VCR */
+ "ldr r0, [r1], #4\n\t"
+ "msr MSP, r0\n\t" /* Main (exception handler) stack. */
+ "ldr r0, [r1]\n\t" /* Reset handler. */
+ "bx r0\n\t"
+ ".align 2\n"
+ "1: .word 0xe000ed00"
+ : /* no output */ : /* no input */ : "memory");
+ /* Artificial entry to refer FT0, FT1, and FT2. */
+ asm volatile (""
+ : : "r" (FT0), "r" (FT1), "r" (FT2));
+#endif
+ /* Never reach here. */
+}
+
+typedef void (*handler)(void);
+extern uint8_t __ram_end__;
+
+handler vector[] __attribute__ ((section(".vectors"))) = {
+ (handler)&__ram_end__,
+ reset,
+ (handler)set_led,
+ flash_unlock,
+ (handler)flash_program_halfword,
+ (handler)flash_erase_page,
+ (handler)flash_check_blank,
+ (handler)flash_write,
+ (handler)flash_protect,
+ (handler)flash_erase_all_and_exec,
+ usb_lld_sys_init,
+ usb_lld_sys_shutdown,
+ nvic_system_reset,
+ clock_init,
+ gpio_init,
+ NULL,
+};
+
+const uint8_t sys_version[8] __attribute__((section(".sys.version"))) = {
+ 3*2+2, /* bLength */
+ 0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE */
+ /* sys version: "2.1" */
+ '2', 0, '.', 0, '1', 0,
+};
+
+const uint32_t __attribute__((section(".sys.board_id")))
+sys_board_id = BOARD_ID;
+
+const uint8_t __attribute__((section(".sys.board_name")))
+sys_board_name[] = BOARD_NAME;
diff --git a/example-led/sys.h b/example-led/sys.h
deleted file mode 120000
index 0e89717..0000000
--- a/example-led/sys.h
+++ /dev/null
@@ -1 +0,0 @@
-../example-fsm-55/sys.h
\ No newline at end of file
diff --git a/example-led/sys.h b/example-led/sys.h
new file mode 100644
index 0000000..4f18291
--- /dev/null
+++ b/example-led/sys.h
@@ -0,0 +1,134 @@
+#if defined(__ARM_ARCH_6M__)
+#define BOARD_ID_STM32F0_DISCOVERY 0xde4b4bc1
+#define BOARD_ID_FSM_55 0x83433c76
+#else
+#define BOARD_ID_CQ_STARM 0xc5480875
+#define BOARD_ID_FST_01_00 0x613870a9
+#define BOARD_ID_FST_01 0x696886af
+#define BOARD_ID_MAPLE_MINI 0x7a445272
+#define BOARD_ID_OLIMEX_STM32_H103 0xf92bb594
+#define BOARD_ID_STBEE_MINI 0x1f341961
+#define BOARD_ID_STBEE 0x945c37e8
+#define BOARD_ID_STM32_PRIMER2 0x21e5798d
+#define BOARD_ID_STM8S_DISCOVERY 0x2f0976bb
+#define BOARD_ID_ST_DONGLE 0x2cd4e471
+#define BOARD_ID_ST_NUCLEO_F103 0x9b87c16d
+#endif
+
+extern const uint8_t sys_version[8];
+extern const uint32_t sys_board_id;
+extern const uint8_t sys_board_name[];
+
+typedef void (*handler)(void);
+extern handler vector[16];
+
+static inline const uint8_t *
+unique_device_id (void)
+{
+ /* STM32F103 has 96-bit unique device identifier */
+ const uint8_t *addr = (const uint8_t *)0x1ffff7e8;
+
+ return addr;
+}
+
+static inline void
+set_led (int on)
+{
+ void (*func) (int) = (void (*)(int))vector[2];
+
+ return (*func) (on);
+}
+
+static inline void
+flash_unlock (void)
+{
+ (*vector[3]) ();
+}
+
+static inline int
+flash_program_halfword (uint32_t addr, uint16_t data)
+{
+ int (*func) (uint32_t, uint16_t) = (int (*)(uint32_t, uint16_t))vector[4];
+
+ return (*func) (addr, data);
+}
+
+static inline int
+flash_erase_page (uint32_t addr)
+{
+ int (*func) (uint32_t) = (int (*)(uint32_t))vector[5];
+
+ return (*func) (addr);
+}
+
+static inline int
+flash_check_blank (const uint8_t *p_start, size_t size)
+{
+ int (*func) (const uint8_t *, int) = (int (*)(const uint8_t *, int))vector[6];
+
+ return (*func) (p_start, size);
+}
+
+static inline int
+flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
+{
+ int (*func) (uint32_t, const uint8_t *, size_t)
+ = (int (*)(uint32_t, const uint8_t *, size_t))vector[7];
+
+ return (*func) (dst_addr, src, len);
+}
+
+static inline int
+flash_protect (void)
+{
+ int (*func) (void) = (int (*)(void))vector[8];
+
+ return (*func) ();
+}
+
+static inline void __attribute__((noreturn))
+flash_erase_all_and_exec (void (*entry)(void))
+{
+ void (*func) (void (*)(void)) = (void (*)(void (*)(void)))vector[9];
+
+ (*func) (entry);
+ for (;;);
+}
+
+static inline void
+usb_lld_sys_init (void)
+{
+ (*vector[10]) ();
+}
+
+static inline void
+usb_lld_sys_shutdown (void)
+{
+ (*vector[11]) ();
+}
+
+static inline void
+nvic_system_reset (void)
+{
+ (*vector[12]) ();
+}
+
+/*
+ * Users can override INLINE by 'attribute((used))' to have an
+ * implementation defined.
+ */
+#if !defined(INLINE)
+#define INLINE __inline__
+#endif
+
+static INLINE void
+clock_init (void)
+{
+ (*vector[13]) ();
+}
+
+static INLINE void
+gpio_init (void)
+{
+ (*vector[14]) ();
+}
--
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