From 21c3f461c56832329a4968103c060ffc22545e96 Mon Sep 17 00:00:00 2001
From: NIIBE Yutaka <gniibe@fsij.org>
Date: Fri, 8 Nov 2013 11:37:53 +0900
Subject: Version 0.02
---
ChangeLog | 10 +++++++
NEWS | 12 ++++++++
README | 4 +--
chopstx.c | 5 ++--
doc/chopstx.texi | 2 +-
example-cdc/usb_stm32f103.c | 67 +++++++++++++++++++--------------------------
6 files changed, 55 insertions(+), 45 deletions(-)
diff --git a/ChangeLog b/ChangeLog
index 80b36fb..c94700b 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,13 @@
+2013-11-08 Niibe Yutaka <gniibe@fsij.org>
+
+ * Version 0.02.
+ * doc/chopstx.texi (VERSION): 0.02.
+
+ * example-cdc/usb_stm32f103.c: Updated from NeuG.
+
+ * chopstx.c (CPU_EXCEPTION_PRIORITY_SYSTICK): Equals to
+ CPU_EXCEPTION_PRIORITY_INTERRUPT.
+
2013-11-03 Niibe Yutaka <gniibe@fsij.org>
* Version 0.01.
diff --git a/NEWS b/NEWS
index 13b8d8d..108a745 100644
--- a/NEWS
+++ b/NEWS
@@ -1,5 +1,17 @@
NEWS - Noteworthy changes
+* Major changes in Chopstx 0.02
+
+ Released 2013-11-08, by NIIBE Yutaka
+
+** Bug fix of priority
+There was a severe bug about the configuraion of priority setting of
+exceptions. As we don't use any inter-lock between interrupts hander
+and timer expiration handler, these priorities should be equal. If
+not, timer expiration handler might interrupt the execution of
+interrupts handers.
+
+
* Major changes in Chopstx 0.01
Released 2013-11-03, by NIIBE Yutaka
diff --git a/README b/README
index b1dc3b5..ea8aa5a 100644
--- a/README
+++ b/README
@@ -1,6 +1,6 @@
Chopstx - Threads and only Threads
- Version 0.01
- 2013-11-03
+ Version 0.02
+ 2013-11-08
Niibe Yutaka
Flying Stone Technology
diff --git a/chopstx.c b/chopstx.c
index ad5b97f..231644c 100644
--- a/chopstx.c
+++ b/chopstx.c
@@ -54,9 +54,8 @@
* Prio 0x30: svc
* ---------------------
* Prio 0x40: thread temporarily inhibiting schedule for critical region
- * Prio 0x50: systick
* ...
- * Prio 0xb0: external interrupt
+ * Prio 0xb0: systick, external interrupt
* Prio 0xc0: pendsv
*/
@@ -65,8 +64,8 @@
#define CPU_EXCEPTION_PRIORITY_SVC 0x30
#define CPU_EXCEPTION_PRIORITY_INHIBIT_SCHED 0x40
-#define CPU_EXCEPTION_PRIORITY_SYSTICK 0x50
/* ... */
+#define CPU_EXCEPTION_PRIORITY_SYSTICK CPU_EXCEPTION_PRIORITY_INTERRUPT
#define CPU_EXCEPTION_PRIORITY_INTERRUPT 0xb0
#define CPU_EXCEPTION_PRIORITY_PENDSV 0xc0
diff --git a/doc/chopstx.texi b/doc/chopstx.texi
index 21d7de9..0d8303e 100644
--- a/doc/chopstx.texi
+++ b/doc/chopstx.texi
@@ -1,7 +1,7 @@
\input texinfo @c -*-texinfo-*-
@c %**start of header
@setfilename chopstx.info
-@set VERSION 0.01
+@set VERSION 0.02
@settitle Chopstx Reference Manual
@c Unify some of the indices.
@syncodeindex tp fn
diff --git a/example-cdc/usb_stm32f103.c b/example-cdc/usb_stm32f103.c
index dd33e67..25c2808 100644
--- a/example-cdc/usb_stm32f103.c
+++ b/example-cdc/usb_stm32f103.c
@@ -93,8 +93,8 @@ static struct DATA_INFO *const data_p = &data_info;
/* Buffer Table address register */
#define BTABLE ((volatile uint16_t *)(REG_BASE + 0x50))
-#define ISTR_CTR (0x8000) /* Correct TRansfer (clear-only bit) */
-#define ISTR_DOVR (0x4000) /* DMA OVeR/underrun (clear-only bit) */
+#define ISTR_CTR (0x8000) /* Correct TRansfer (read-only bit) */
+#define ISTR_OVR (0x4000) /* OVeR/underrun (clear-only bit) */
#define ISTR_ERR (0x2000) /* ERRor (clear-only bit) */
#define ISTR_WKUP (0x1000) /* WaKe UP (clear-only bit) */
#define ISTR_SUSP (0x0800) /* SUSPend (clear-only bit) */
@@ -105,8 +105,7 @@ static struct DATA_INFO *const data_p = &data_info;
#define ISTR_DIR (0x0010) /* DIRection of transaction (read-only bit) */
#define ISTR_EP_ID (0x000F) /* EndPoint IDentifier (read-only bit) */
-#define CLR_CTR (~ISTR_CTR) /* clear Correct TRansfer bit */
-#define CLR_DOVR (~ISTR_DOVR) /* clear DMA OVeR/underrun bit*/
+#define CLR_OVR (~ISTR_OVR) /* clear OVeR/underrun bit*/
#define CLR_ERR (~ISTR_ERR) /* clear ERRor bit */
#define CLR_WKUP (~ISTR_WKUP) /* clear WaKe UP bit */
#define CLR_SUSP (~ISTR_SUSP) /* clear SUSPend bit */
@@ -115,7 +114,7 @@ static struct DATA_INFO *const data_p = &data_info;
#define CLR_ESOF (~ISTR_ESOF) /* clear Expected Start Of Frame bit */
#define CNTR_CTRM (0x8000) /* Correct TRansfer Mask */
-#define CNTR_DOVRM (0x4000) /* DMA OVeR/underrun Mask */
+#define CNTR_OVRM (0x4000) /* OVeR/underrun Mask */
#define CNTR_ERRM (0x2000) /* ERRor Mask */
#define CNTR_WKUPM (0x1000) /* WaKe UP Mask */
#define CNTR_SUSPM (0x0800) /* SUSPend Mask */
@@ -391,19 +390,19 @@ usb_interrupt_handler (void)
{
uint16_t istr_value = st103_get_istr ();
- if (istr_value & ISTR_CTR)
+ if ((istr_value & ISTR_CTR))
usb_handle_transfer ();
- if (istr_value & ISTR_RESET)
+ if ((istr_value & ISTR_RESET))
{
st103_set_istr (CLR_RESET);
usb_cb_device_reset ();
}
- if (istr_value & ISTR_DOVR)
- st103_set_istr (CLR_DOVR);
+ if ((istr_value & ISTR_OVR))
+ st103_set_istr (CLR_OVR);
- if (istr_value & ISTR_ERR)
+ if ((istr_value & ISTR_ERR))
st103_set_istr (CLR_ERR);
}
@@ -539,7 +538,7 @@ static int std_get_status (uint8_t req,
uint8_t endpoint = (index & 0x0f);
uint16_t status;
- if ((index & 0x70) != 0 || endpoint == ENDP0)
+ if ((index & 0x70) || endpoint == ENDP0)
return USB_UNSUPPORT;
if ((index & 0x80))
@@ -938,35 +937,29 @@ usb_handle_transfer (void)
uint16_t istr_value;
uint8_t ep_index;
- while (((istr_value = st103_get_istr ()) & ISTR_CTR) != 0)
+ while (((istr_value = st103_get_istr ()) & ISTR_CTR))
{
ep_index = (istr_value & ISTR_EP_ID);
+ /* Decode and service non control endpoints interrupt */
+ /* process related endpoint register */
+ ep_value = st103_get_epreg (ep_index);
+
if (ep_index == 0)
{
- if ((istr_value & ISTR_DIR) == 0)
- { /* DIR = 0 */
- /* DIR = 0 => IN int */
- /* DIR = 0 implies that (EP_CTR_TX = 1) always */
-
- st103_ep_clear_ctr_tx (ENDP0);
+ if ((ep_value & EP_CTR_TX))
+ {
+ st103_ep_clear_ctr_tx (ep_index);
handle_in0 ();
}
- else
- { /* DIR = 1 */
- /* DIR = 1 & CTR_RX => SETUP or OUT int */
- /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
- ep_value = st103_get_epreg (ENDP0);
- if ((ep_value & EP_SETUP) != 0)
- {
- st103_ep_clear_ctr_rx (ENDP0);
- handle_setup0 ();
- }
- else if ((ep_value & EP_CTR_RX) != 0)
- {
- st103_ep_clear_ctr_rx (ENDP0);
- handle_out0 ();
- }
+ if ((ep_value & EP_CTR_RX))
+ {
+ st103_ep_clear_ctr_rx (ep_index);
+
+ if ((ep_value & EP_SETUP))
+ handle_setup0 ();
+ else
+ handle_out0 ();
}
if (dev_p->state == STALLED)
@@ -974,11 +967,7 @@ usb_handle_transfer (void)
}
else
{
- /* Decode and service non control endpoints interrupt */
- /* process related endpoint register */
- ep_value = st103_get_epreg (ep_index);
-
- if ((ep_value & EP_CTR_RX) != 0)
+ if ((ep_value & EP_CTR_RX))
{
st103_ep_clear_ctr_rx (ep_index);
switch ((ep_index - 1))
@@ -993,7 +982,7 @@ usb_handle_transfer (void)
}
}
- if ((ep_value & EP_CTR_TX) != 0)
+ if ((ep_value & EP_CTR_TX))
{
st103_ep_clear_ctr_tx (ep_index);
switch ((ep_index - 1))
--
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